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([2a01:e0a:982:cbb0:560a:f70f:7627:2c48]) by smtp.gmail.com with ESMTPSA id w13-20020a05600c474d00b0040ec66021a7sm1870497wmo.1.2024.02.02.00.03.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 02 Feb 2024 00:03:13 -0800 (PST) Message-ID: <6f89dd4f-aae5-4221-9a0a-bebbef862229@linaro.org> Date: Fri, 2 Feb 2024 09:03:12 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Neil Armstrong Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH] arm64: dts: qcom: sm8650: Use GIC-ITS for PCIe0 and PCIe1 Content-Language: en-US, fr To: Konrad Dybcio , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20240125-topic-sm8650-upstream-pcie-its-v1-1-cb506deeb43e@linaro.org> <0cf69024-a3e6-4be2-89ce-017ae521721d@linaro.org> Autocrypt: addr=neil.armstrong@linaro.org; keydata= xsBNBE1ZBs8BCAD78xVLsXPwV/2qQx2FaO/7mhWL0Qodw8UcQJnkrWmgTFRobtTWxuRx8WWP GTjuhvbleoQ5Cxjr+v+1ARGCH46MxFP5DwauzPekwJUD5QKZlaw/bURTLmS2id5wWi3lqVH4 BVF2WzvGyyeV1o4RTCYDnZ9VLLylJ9bneEaIs/7cjCEbipGGFlfIML3sfqnIvMAxIMZrvcl9 qPV2k+KQ7q+aXavU5W+yLNn7QtXUB530Zlk/d2ETgzQ5FLYYnUDAaRl+8JUTjc0CNOTpCeik 80TZcE6f8M76Xa6yU8VcNko94Ck7iB4vj70q76P/J7kt98hklrr85/3NU3oti3nrIHmHABEB AAHNKk5laWwgQXJtc3Ryb25nIDxuZWlsLmFybXN0cm9uZ0BsaW5hcm8ub3JnPsLAkQQTAQoA OwIbIwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgBYhBInsPQWERiF0UPIoSBaat7Gkz/iuBQJk Q5wSAhkBAAoJEBaat7Gkz/iuyhMIANiD94qDtUTJRfEW6GwXmtKWwl/mvqQtaTtZID2dos04 YqBbshiJbejgVJjy+HODcNUIKBB3PSLaln4ltdsV73SBcwUNdzebfKspAQunCM22Mn6FBIxQ GizsMLcP/0FX4en9NaKGfK6ZdKK6kN1GR9YffMJd2P08EO8mHowmSRe/ExAODhAs9W7XXExw UNCY4pVJyRPpEhv373vvff60bHxc1k/FF9WaPscMt7hlkbFLUs85kHtQAmr8pV5Hy9ezsSRa GzJmiVclkPc2BY592IGBXRDQ38urXeM4nfhhvqA50b/nAEXc6FzqgXqDkEIwR66/Gbp0t3+r yQzpKRyQif3OwE0ETVkGzwEIALyKDN/OGURaHBVzwjgYq+ZtifvekdrSNl8TIDH8g1xicBYp QTbPn6bbSZbdvfeQPNCcD4/EhXZuhQXMcoJsQQQnO4vwVULmPGgtGf8PVc7dxKOeta+qUh6+ SRh3vIcAUFHDT3f/Zdspz+e2E0hPV2hiSvICLk11qO6cyJE13zeNFoeY3ggrKY+IzbFomIZY 4yG6xI99NIPEVE9lNBXBKIlewIyVlkOaYvJWSV+p5gdJXOvScNN1epm5YHmf9aE2ZjnqZGoM Mtsyw18YoX9BqMFInxqYQQ3j/HpVgTSvmo5ea5qQDDUaCsaTf8UeDcwYOtgI8iL4oHcsGtUX oUk33HEAEQEAAcLAXwQYAQIACQUCTVkGzwIbDAAKCRAWmrexpM/4rrXiB/sGbkQ6itMrAIfn M7IbRuiSZS1unlySUVYu3SD6YBYnNi3G5EpbwfBNuT3H8//rVvtOFK4OD8cRYkxXRQmTvqa3 3eDIHu/zr1HMKErm+2SD6PO9umRef8V82o2oaCLvf4WeIssFjwB0b6a12opuRP7yo3E3gTCS KmbUuLv1CtxKQF+fUV1cVaTPMyT25Od+RC1K+iOR0F54oUJvJeq7fUzbn/KdlhA8XPGzwGRy 4zcsPWvwnXgfe5tk680fEKZVwOZKIEuJC3v+/yZpQzDvGYJvbyix0lHnrCzq43WefRHI5XTT QbM0WUIBIcGmq38+OgUsMYu4NzLu7uZFAcmp6h8g Organization: Linaro Developer Services In-Reply-To: <0cf69024-a3e6-4be2-89ce-017ae521721d@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 01/02/2024 20:59, Konrad Dybcio wrote: > On 25.01.2024 17:55, Neil Armstrong wrote: >> Both PCIe0 and PCIe1 controllers are capable of signalling the MSIs >> received from endpoint devices to the CPU using GIC-ITS MSI controller. >> Add support for it. >> >> The GIC-ITS MSI implementation provides an advantage over internal MSI >> implementation using Locality-specific Peripheral Interrupts (LPI) that >> would allow MSIs to be targeted for each CPU core. >> >> Like SM8450 & SM8550, the IDs are swapped, but works fine on PCIe0 and PCIe1. >> >> WiFi PCIe Device on SM8650-QRD using GIC-ITS: >> 159: 0 0 0 0 0 0 0 0 ITS-MSI 0 Edge PCIe PME, aerdrv >> 167: 0 4 0 0 0 0 0 0 ITS-MSI 524288 Edge bhi >> 168: 0 0 4 0 0 0 0 0 ITS-MSI 524289 Edge mhi >> 169: 0 0 0 34 0 0 0 0 ITS-MSI 524290 Edge mhi >> 170: 0 0 0 0 3 0 0 0 ITS-MSI 524291 Edge ce0 >> 171: 0 0 0 0 0 2 0 0 ITS-MSI 524292 Edge ce1 >> 172: 0 0 0 0 0 0 806 0 ITS-MSI 524293 Edge ce2 >> 173: 0 0 0 0 0 0 0 76 ITS-MSI 524294 Edge ce3 >> 174: 0 0 0 0 0 0 0 0 ITS-MSI 524295 Edge ce5 >> 175: 0 13 0 0 0 0 0 0 ITS-MSI 524296 Edge DP_EXT_IRQ >> 176: 0 0 0 0 0 0 0 0 ITS-MSI 524297 Edge DP_EXT_IRQ > > Is it by chance that this one never fired? Yeah I only associated to an SSID and did a simple iperf, not enough to trigger all MSIs Neil > > (lgtm otherwise) > > Konrad