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Fri, 02 Feb 2024 04:26:56 -0800 (PST) Date: Fri, 2 Feb 2024 17:56:48 +0530 From: Manivannan Sadhasivam To: Serge Semin Cc: Mrinmay Sarkar , vkoul@kernel.org, jingoohan1@gmail.com, conor+dt@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_parass@quicinc.com, quic_schintav@quicinc.com, quic_shijjose@quicinc.com, Gustavo Pimentel , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, mhi@lists.linux.dev Subject: Re: [PATCH v1 4/6] dmaengine: dw-edma: Move HDMA_V0_MAX_NR_CH definition to edma.h Message-ID: <20240202122648.GD8020@thinkpad> References: <1705669223-5655-1-git-send-email-quic_msarkar@quicinc.com> <1705669223-5655-5-git-send-email-quic_msarkar@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Fri, Feb 02, 2024 at 01:47:37PM +0300, Serge Semin wrote: > Hi Mrinmay > > On Fri, Jan 19, 2024 at 06:30:20PM +0530, Mrinmay Sarkar wrote: > > From: Manivannan Sadhasivam > > > > To maintain uniformity with eDMA, let's move the HDMA max channel > > definition to edma.h. While at it, let's also rename it to HDMA_MAX_NR_CH. > > First of all include/linux/dma/edma.h already contains the common DW > EDMA and _HDMA_ settings/entities including the number of channels. > Both of these IP-cores have the same constraints on the max amount of > channels. Moreover the EDMA_MAX_WR_CH/EDMA_MAX_RD_CH macros are > already utilized in the common dw_edma_probe() method. So to speak you > can freely use these macros for HDMA too. Thus this change is > redundant. So is the patches 1/6 and 2/6. > > Note currently all the common DW EDMA driver code uses the EDMA_/edma_ > prefixes. HDMA_/hdma_ prefixes are utilized in the Native > HDMA-specific module only. So if you wished to provide some IP-core > specific settings utilized in the common part of the driver, then the > best approach would be to provide a change for the entire driver > interface (for instance first convert it to having a neutral prefixes, > like xdma_/etc, and then use the IP-core specific ones). So please > just use the EDMA_MAX_WR_CH and EDMA_MAX_RD_CH macros and drop the > patches 1, 2, and 4. > Hmm. With my limited access to the HDMA IP insights, I was not aware that the constraints are similar with EDMA. If so, then it makes sense to reuse the same macros. But I would also add a comment on top of the macros to avoid confusion. - Mani > -Serge(y) > > > > > Signed-off-by: Manivannan Sadhasivam > > Signed-off-by: Mrinmay Sarkar > > --- > > drivers/dma/dw-edma/dw-hdma-v0-core.c | 4 ++-- > > drivers/dma/dw-edma/dw-hdma-v0-regs.h | 3 +-- > > include/linux/dma/edma.h | 1 + > > 3 files changed, 4 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c > > index 1f4cb7d..819ef1f 100644 > > --- a/drivers/dma/dw-edma/dw-hdma-v0-core.c > > +++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c > > @@ -54,7 +54,7 @@ static void dw_hdma_v0_core_off(struct dw_edma *dw) > > { > > int id; > > > > - for (id = 0; id < HDMA_V0_MAX_NR_CH; id++) { > > + for (id = 0; id < HDMA_MAX_NR_CH; id++) { > > SET_BOTH_CH_32(dw, id, int_setup, > > HDMA_V0_STOP_INT_MASK | HDMA_V0_ABORT_INT_MASK); > > SET_BOTH_CH_32(dw, id, int_clear, > > @@ -70,7 +70,7 @@ static u16 dw_hdma_v0_core_ch_count(struct dw_edma *dw, enum dw_edma_dir dir) > > * available, we set it to maximum channels and let the platform > > * set the right number of channels. > > */ > > - return HDMA_V0_MAX_NR_CH; > > + return HDMA_MAX_NR_CH; > > } > > > > static enum dma_status dw_hdma_v0_core_ch_status(struct dw_edma_chan *chan) > > diff --git a/drivers/dma/dw-edma/dw-hdma-v0-regs.h b/drivers/dma/dw-edma/dw-hdma-v0-regs.h > > index a974abd..cd7eab2 100644 > > --- a/drivers/dma/dw-edma/dw-hdma-v0-regs.h > > +++ b/drivers/dma/dw-edma/dw-hdma-v0-regs.h > > @@ -11,7 +11,6 @@ > > > > #include > > > > -#define HDMA_V0_MAX_NR_CH 8 > > #define HDMA_V0_LOCAL_ABORT_INT_EN BIT(6) > > #define HDMA_V0_REMOTE_ABORT_INT_EN BIT(5) > > #define HDMA_V0_LOCAL_STOP_INT_EN BIT(4) > > @@ -92,7 +91,7 @@ struct dw_hdma_v0_ch { > > } __packed; > > > > struct dw_hdma_v0_regs { > > - struct dw_hdma_v0_ch ch[HDMA_V0_MAX_NR_CH]; /* 0x0000..0x0fa8 */ > > + struct dw_hdma_v0_ch ch[HDMA_MAX_NR_CH]; /* 0x0000..0x0fa8 */ > > } __packed; > > > > struct dw_hdma_v0_lli { > > diff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h > > index 550f6a4..2cdf249a 100644 > > --- a/include/linux/dma/edma.h > > +++ b/include/linux/dma/edma.h > > @@ -14,6 +14,7 @@ > > > > #define EDMA_MAX_WR_CH 8 > > #define EDMA_MAX_RD_CH 8 > > +#define HDMA_MAX_NR_CH 8 > > > > struct dw_edma; > > struct dw_edma_chip; > > -- > > 2.7.4 > > -- மணிவண்ணன் சதாசிவம்