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Fri, 02 Feb 2024 04:43:45 -0800 (PST) Date: Fri, 2 Feb 2024 18:13:39 +0530 From: Manivannan Sadhasivam To: Abel Vesa Cc: neil.armstrong@linaro.org, Konrad Dybcio , Bjorn Andersson , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/2] PCI: qcom: Add X1E80100 PCIe support Message-ID: <20240202124339.GE8020@thinkpad> References: <20240129-x1e80100-pci-v2-0-a466d10685b6@linaro.org> <20240129-x1e80100-pci-v2-2-a466d10685b6@linaro.org> <30360d96-4513-40c4-9646-e3ae09121fa7@linaro.org> <20240202084157.GE2961@thinkpad> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Fri, Feb 02, 2024 at 12:31:32PM +0200, Abel Vesa wrote: > On 24-02-02 14:11:57, Manivannan Sadhasivam wrote: > > On Fri, Feb 02, 2024 at 09:13:25AM +0100, neil.armstrong@linaro.org wrote: > > > On 01/02/2024 20:20, Konrad Dybcio wrote: > > > > On 29.01.2024 12:10, Abel Vesa wrote: > > > > > Add the compatible and the driver data for X1E80100. > > > > > > > > > > Signed-off-by: Abel Vesa > > > > > --- > > > > > drivers/pci/controller/dwc/pcie-qcom.c | 1 + > > > > > 1 file changed, 1 insertion(+) > > > > > > > > > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > > > > > index 10f2d0bb86be..2a6000e457bc 100644 > > > > > --- a/drivers/pci/controller/dwc/pcie-qcom.c > > > > > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > > > > > @@ -1642,6 +1642,7 @@ static const struct of_device_id qcom_pcie_match[] = { > > > > > { .compatible = "qcom,pcie-sm8450-pcie0", .data = &cfg_1_9_0 }, > > > > > { .compatible = "qcom,pcie-sm8450-pcie1", .data = &cfg_1_9_0 }, > > > > > { .compatible = "qcom,pcie-sm8550", .data = &cfg_1_9_0 }, > > > > > + { .compatible = "qcom,pcie-x1e80100", .data = &cfg_1_9_0 }, > > > > > > > > I swear I'm not delaying everything related to x1 on purpose.. > > > > > > > > But.. > > > > > > > > Would a "qcom,pcie-v1.9.0" generic match string be a good idea? > > > > > > Yes as fallback, this is why I used qcom,pcie-sm8550 as fallback for SM8650. > > > > > > > Right. Fallback should be used here also. > > So after digging a bit more ... > > Nope. Fallback approach doesn't work for X1E80100. > > The ddrss_sf_qtb clock is, on this platform, under RPMH control, > and therefore not registered by the GCC. This implies this clock cannot > be provided to the pcie controller node in DT, which implies the > bindings are different when compared to sm8550. So dedicated compatible > is needed. > > So this patchset should remain as is. > Apologies! I just went with the conversation without cross checking the DT binding. You have already listed it as a separate entry. - Mani -- மணிவண்ணன் சதாசிவம்