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Date: Fri, 2 Feb 2024 20:33:26 +0100
From: Lukas Wunner <lukas@wunner.de>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Lorenzo Pieralisi <lpieralisi@kernel.org>,
	Krzysztof Wilczy??ski <kw@linux.com>, Rob Herring <robh@kernel.org>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	quic_krichai@quicinc.com, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH 0/2] Enable D3 support for Qualcomm bridges
Message-ID: <20240202193326.GA29000@wunner.de>
References: <20240202-pcie-qcom-bridge-v1-0-46d7789836c0@linaro.org>
 <20240202090033.GA9589@wunner.de>
 <20240202100041.GB8020@thinkpad>
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On Fri, Feb 02, 2024 at 03:30:41PM +0530, Manivannan Sadhasivam wrote:
> On Fri, Feb 02, 2024 at 10:00:33AM +0100, Lukas Wunner wrote:
> > Please amend platform_pci_bridge_d3() to call a new of_pci_bridge_d3()
> > function which determines whether D3 is supported by the platform.
> > 
> > E.g. of_pci_bridge_d3() could contain a whitelist of supported VID/DID
> > tuples.  Or it could be defined as a __weak function which always
> > returns false but can be overridden at link time by a function
> > defined somewhere in arch/arm/, arch/arm64/ or in some driver
> > whose Kconfig option is enabled in Qualcomm platforms.
> 
> Hmm. If we go with a DT based solution, then introducing a new property like
> "d3-support" in the PCI bridge node would be the right approach. But then, it
> also requires defining the PCI bridge node in all the DTs. But that should be
> fine since it will help us to support WAKE# (per bridge) in the future.

I'm not sure whether a "d3-support" property would be acceptable.
My understanding is that capabilities which can be auto-sensed by
the driver (or the PCI core in this case), e.g. by looking at the
PCI IDs or compatible string, should not be described in the DT.

My point was really that this should be determined by
platform_pci_bridge_d3(), that's what the function is for,
instead of inventing a new mechanism.  Exactly how the capability
is detected by of_pci_bridge_d3() is up to DT schema maintainers.

A DT property does have the advantage of better maintainability,
unlike a whitelist which may need to constantly be extended.

Thanks,

Lukas