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Fri, 2 Feb 2024 15:53:47 -0500 (EST) Received: from mail.savoirfairelinux.com (mail.savoirfairelinux.com [192.168.48.237]) by mail.savoirfairelinux.com (Postfix) with ESMTP id 759A99C15A8; Fri, 2 Feb 2024 15:53:47 -0500 (EST) Date: Fri, 2 Feb 2024 15:53:47 -0500 (EST) From: Charles Perry To: Rob Herring Cc: mdf , Allen VANDIVER , Brian CODY , hao wu , yilun xu , Tom Rix , krzysztof kozlowski+dt , Conor Dooley , Michal Simek , linux-fpga , devicetree , linux-kernel , linux-arm-kernel Message-ID: <840358370.469058.1706907227423.JavaMail.zimbra@savoirfairelinux.com> In-Reply-To: <20240202201646.GA903809-robh@kernel.org> References: <20240129225602.3832449-1-charles.perry@savoirfairelinux.com> <20240131230542.3993409-1-charles.perry@savoirfairelinux.com> <20240202201646.GA903809-robh@kernel.org> Subject: Re: [PATCH 0/3] fpga: xilinx-selectmap: add new driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-Mailer: Zimbra 8.8.15_GA_4581 (ZimbraWebClient - GC120 (Linux)/8.8.15_GA_4581) Thread-Topic: fpga: xilinx-selectmap: add new driver Thread-Index: MPhuH8qDC3JIZ5Xmftm01iQPgu4MyA== On Feb 2, 2024, at 3:16 PM, Rob Herring robh@kernel.org wrote: > On Wed, Jan 31, 2024 at 06:05:30PM -0500, Charles Perry wrote: >> Hello, >> >> This patchset adds a new driver for the 7 series FPGA's SelectMAP >> interface. >> >> The SelectMAP interface shares a common GPIO protocol with the SPI >> interface which is already in the kernel (drivers/fpga/xilinx-spi.c). >> The approach proposed in this patchset is to refactor xilinx-spi.c into >> xilinx-core.c which would handle the common GPIO protocol. This is then >> used to build two drivers, the already existing xilinx-spi.c driver and >> a newly added xilinx-selectmap.c driver. >> >> The SelectMAP driver proposed only supports 8 bit mode. This is because >> the 16 and 32 bits mode have limitations with regards to compressed >> bitstream support as well as introducing endianness considerations. >> >> I'm testing xilinx-selectmap.c on a custom i.MX6 board connected to an >> Artix 7 FPGA. Flashing a 913K bitstream takes 0.44 seconds. >> >> v2: From Krzysztof Kozlowski review's: >> * Use more conventional names for gpio DT bindings >> * fix example in DT bindings >> * add mc-peripheral-props.yaml to DT bindings >> * fix various formatting mistakes >> * Remove all occurences of the "slave" word. > > Please label the series with the version number and don't send new > versions as replies to the previous version. > > Rob Ok, will do. Regards, Charles