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Fri, 02 Feb 2024 20:55:17 -0800 (PST) Date: Sat, 3 Feb 2024 10:25:12 +0530 From: Manivannan Sadhasivam To: Lukas Wunner Cc: Bjorn Helgaas , Bjorn Andersson , Konrad Dybcio , Lorenzo Pieralisi , Krzysztof Wilczy??ski , Rob Herring , Mika Westerberg , quic_krichai@quicinc.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: Re: [PATCH 0/2] Enable D3 support for Qualcomm bridges Message-ID: <20240203045512.GA3038@thinkpad> References: <20240202-pcie-qcom-bridge-v1-0-46d7789836c0@linaro.org> <20240202090033.GA9589@wunner.de> <20240202100041.GB8020@thinkpad> <20240202193326.GA29000@wunner.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240202193326.GA29000@wunner.de> On Fri, Feb 02, 2024 at 08:33:26PM +0100, Lukas Wunner wrote: > On Fri, Feb 02, 2024 at 03:30:41PM +0530, Manivannan Sadhasivam wrote: > > On Fri, Feb 02, 2024 at 10:00:33AM +0100, Lukas Wunner wrote: > > > Please amend platform_pci_bridge_d3() to call a new of_pci_bridge_d3() > > > function which determines whether D3 is supported by the platform. > > > > > > E.g. of_pci_bridge_d3() could contain a whitelist of supported VID/DID > > > tuples. Or it could be defined as a __weak function which always > > > returns false but can be overridden at link time by a function > > > defined somewhere in arch/arm/, arch/arm64/ or in some driver > > > whose Kconfig option is enabled in Qualcomm platforms. > > > > Hmm. If we go with a DT based solution, then introducing a new property like > > "d3-support" in the PCI bridge node would be the right approach. But then, it > > also requires defining the PCI bridge node in all the DTs. But that should be > > fine since it will help us to support WAKE# (per bridge) in the future. > > I'm not sure whether a "d3-support" property would be acceptable. > My understanding is that capabilities which can be auto-sensed by > the driver (or the PCI core in this case), e.g. by looking at the > PCI IDs or compatible string, should not be described in the DT. > We cannot whitelist platforms in DT. DT should describe the hardware and its capabilities. In this case, the "supports-d3" property as I proposed [1] tells the OS that this bridge is capable of supporting D3. Blacklisting/whitelisting belongs to the OS. We can however, whitelist the bridges in PCI core. But that has the downside of not being useful to other OSes supporting DT. Hence, a DT property that describes the hardware capability makes sense to me. - Mani [1] https://github.com/devicetree-org/dt-schema/pull/127 -- மணிவண்ணன் சதாசிவம்