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Mon, 5 Feb 2024 08:15:55 +0000 Received: from AS8PR04MB8644.eurprd04.prod.outlook.com ([fe80::651a:dedd:945a:d1dd]) by AS8PR04MB8644.eurprd04.prod.outlook.com ([fe80::651a:dedd:945a:d1dd%6]) with mapi id 15.20.7249.032; Mon, 5 Feb 2024 08:15:55 +0000 Message-ID: <9eb85f99-d9a2-4e40-9b15-8a3145350904@topic.nl> Date: Mon, 5 Feb 2024 09:15:54 +0100 User-Agent: Mozilla Thunderbird From: Mike Looijmans Subject: Re: [PATCH v2 2/2] iio: adc: ti-ads1298: Add driver To: Jonathan Cameron CC: devicetree@vger.kernel.org, linux-iio@vger.kernel.org, Andy Shevchenko , Lars-Peter Clausen , Liam Beguin , Liam Girdwood , Maksim Kiselev , Marcus Folkesson , Marius Cristea , Mark Brown , Niklas Schnelle , Okan Sahin , linux-kernel@vger.kernel.org References: <20240202105901.925875-1-mike.looijmans@topic.nl> <1b153bce-a66a-45ee-a5c6-963ea6fb1c82.949ef384-8293-46b8-903f-40a477c056ae.6274d473-fd3f-439a-bf61-89eea8028afa@emailsignatures365.codetwo.com> <20240202105901.925875-2-mike.looijmans@topic.nl> <20240204155422.5ae03e4c@jic23-huawei> Content-Language: en-US, nl Organization: Topic In-Reply-To: <20240204155422.5ae03e4c@jic23-huawei> Content-Type: text/plain; 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X-OriginatorOrg: topic.nl X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2024 08:16:45.9339 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cfeb3c9f-613f-409e-924b-08dc2622cb6c X-MS-Exchange-CrossTenant-Id: 449607a5-3517-482d-8d16-41dd868cbda3 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=449607a5-3517-482d-8d16-41dd868cbda3;Ip=[20.93.157.195];Helo=[westeu11-emailsignatures-cloud.codetwo.com] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF0003922F.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR04MB9675 Met vriendelijke groet / kind regards,=0A= =0A= Mike Looijmans=0A= System Expert=0A= =0A= =0A= TOPIC Embedded Products B.V.=0A= Materiaalweg 4, 5681 RJ Best=0A= The Netherlands=0A= =0A= T: +31 (0) 499 33 69 69=0A= E: mike.looijmans@topic.nl=0A= W: www.topic.nl=0A= =0A= Please consider the environment before printing this e-mail=0A= On 04-02-2024 16:54, Jonathan Cameron wrote: > On Fri, 2 Feb 2024 11:59:01 +0100 > Mike Looijmans wrote: > >> Skeleton driver for the TI ADS1298 medical ADC. This device is >> typically used for ECG and similar measurements. Supports data >> acquisition at configurable scale and sampling frequency. >> >> Signed-off-by: Mike Looijmans >> > Hi Mike, > > A few minor things I'd missed before. > > I'm still interested in why more standard interrupt handling isn't > good enough here (see reply to v1 thread) but if we can't get to the bott= om > of that (or do figure it out and we can't fix it) then this doesn't look > too bad so I'll accept the complex handling. I think one of the key elements was the IRQF_ONESHOT usage. The DRDY=20 signal on this chip isn't a "level" signal as most chips have, it will=20 de-assert at any rising edge of the SPI clock, without regarding=20 chip-select. There's no other indication of "data ready", so the only=20 way is to keep the interrupt active on edge detect. Keeping things in hard IRQ handlers reduces the number of context=20 switches, and the amount of work done is minimal. A worker thread would=20 wake at every DRDY signal, and after the corresponding SPI transaction.=20 This doesn't account for much overhead, but the interrupt rate is double=20 the sampling frequency. Most importantly, the device doesn't have to=20 compete with other threads in the system. If I have time and hardware available, I try to get some timing info=20 with an oscilloscope... Assume "yes" to all other suggestions... >> + ret =3D devm_request_irq(dev, spi->irq, &ads1298_interrupt, >> + IRQF_TRIGGER_FALLING, indio_dev->name, > I missed this before (and we've gotten it wrong a bunch of times in the p= ast > so plenty of bad examples to copy that we can't fix without possible > regressions) but we generally now leave irq direction to the firmware des= cription. > People have an annoying habit of putting not gates and similar in the pat= h > to interrupt pins. Fine to have the binding state the expected form thou= gh > (as you do). So basically not flags here. I'd be happy to leave the IRQ direction to firmware (indeed, inverters=20 happen...), but afaik that wasn't possible with interrupts. I'll dig=20 into the docs to see if that has changed recently. > I'm still curious to understand more of where the delays that lead to > needing to do this complex handling came from, but I guess it's not too b= ad > if we can't get to the bottom of that so I'll take the driver anyway > (after a little more time on list for others to review!) > >> + indio_dev); (PS - sorry for sending HTML, consider me appropriately punisched for that) --=20 Mike Looijmans System Expert TOPIC Embedded Products B.V. Materiaalweg 4, 5681 RJ Best The Netherlands T: +31 (0) 499 33 69 69 E:mike.looijmans@topic.nl W:www.topic.nl