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h=From:Subject:Date:To:Cc:From; b=TgPAjrgSt35SPVjCcqmmPj/tSXqjAbk4HD7ypkMPNnq4uEeG5UaPfN8sK25450VLM 9ilvuQHdgHWsdP8Ex2CLGEJ4muZ5Wqg5mdflZpGZmexoLCZljKlu53z3UcVKAzI6t+ M4Vd2668bc2SY90W4XseI8Kch8rde3ufYGM1jq7scSs0zRf850H4NSeDiZSiDw7puZ xjbw/jXIwYAXG271YafuGuMxXYrI3nKU+VtyP9Ljy2a9UL4y6nIOGbGSI2Qa4I7Q6G m9l0P16ACm/R2HsCIOEz+Edk+360NJ/4F4ntM0cmC3mS3cEBSZerJV7kW/JwzhnxXt MeVQ3O2adLQkQ== Received: from localhost (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madrid.collaboradmins.com (Postfix) with ESMTPSA id F1332378107C; Mon, 5 Feb 2024 11:26:00 +0000 (UTC) From: Cristian Ciocaltea Subject: [PATCH v2 0/2] Add support for RK3588 HDMI/eDP Combo PHY Date: Mon, 05 Feb 2024 13:24:23 +0200 Message-Id: <20240205-phy-hdptx-v2-0-a7150814c047@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAGjFwGUC/6WOQQqDMBBFryJZN5JEkdhV71FcjHFsBtTIREQR7 97oqvsuHzze/4eIyIRRPLNDMK4UKUwJzCMTzsP0QUldYmGUKZU2Vs5+l76bl01aqC20leq0RZH 8mbGn7W69m8Q9h1EunhF+CrrWdWFVlWtVKKNLqaVjigvBlDsKDoYF4eXCMEAbGHIXxqvtkxJ4v 2+u+lr4o9ec5/kFnws8avkAAAA= To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Johan Jonker , Sebastian Reichel , Cristian Ciocaltea , Sascha Hauer , Andy Yan , Vinod Koul , Kishon Vijay Abraham I , Philipp Zabel , Algea Cao Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, kernel@collabora.com, Krzysztof Kozlowski X-Mailer: b4 0.13-dev-a684c Add driver and bindings to add initial support the Rockchip HDMI/eDP TX Combo PHY found on RK3588 SoC. The PHY is based on a Samsung IP block and supports HDMI 2.1 TMDS, FRL and eDP links. Please note that currently only the TMDS related functionality has been implemented. This has been tested on Radxa ROCK 5B and Rockchip EVB1 boards. Changes in v2: - Rebased series onto next-20240129 - Removed patch 'dt-bindings: soc: rockchip: Add rk3588 hdptxphy syscon' already applied by Heiko - For consistency with SoC TRM, replaced all references to DP with eDP - Updated PHY schema per Krzysztof's review; also collected his R-b tag - Dropped FRL, EARC and 10-bit color depth functionality until the HDMI configuration options become available in PHY API - Squashed lots of regmap_write operations via regmap_multi_reg_write (Sebastian) - Introduced parametrized {CMN|SB|LNTOP|LANE}_REG() macros to replace the long list of register defines - Optimized handling of the config arrays by using ARRAY_SIZE() (Sascha) - Link to v1: https://lore.kernel.org/r/20240119193806.1030214-1-cristian.ciocaltea@collabora.com --- Cristian Ciocaltea (2): dt-bindings: phy: Add Rockchip HDMI/eDP Combo PHY schema phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver .../bindings/phy/rockchip,rk3588-hdptx-phy.yaml | 91 ++ drivers/phy/rockchip/Kconfig | 8 + drivers/phy/rockchip/Makefile | 1 + drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 1040 ++++++++++++++++++++ 4 files changed, 1140 insertions(+) --- base-commit: 596764183be8ebb13352b281a442a1f1151c9b06 change-id: 20240128-phy-hdptx-8a98ab60d18e