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Message-ID: <65c2649a.1c0a0220.ca891.c8da@mx.google.com>
Date: Tue, 6 Feb 2024 17:55:49 +0100
From: Christian Marangi <ansuelsmth@gmail.com>
To: Conor Dooley <conor@kernel.org>
Cc: "David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Andrew Lunn <andrew@lunn.ch>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	Florian Fainelli <florian.fainelli@broadcom.com>,
	Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>,
	Robert Marko <robert.marko@sartura.hr>, netdev@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org
Subject: Re: [net-next PATCH v6 05/10] dt-bindings: net: Document Qcom
 QCA807x PHY package
References: <20240205164851.1351-1-ansuelsmth@gmail.com>
 <20240205164851.1351-6-ansuelsmth@gmail.com>
 <20240206-correct-viscous-1f8c163f4d0c@spud>
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On Tue, Feb 06, 2024 at 04:32:29PM +0000, Conor Dooley wrote:
> Hey Christian,
> 
> On Mon, Feb 05, 2024 at 05:48:37PM +0100, Christian Marangi wrote:
> > Document Qcom QCA807x PHY package.
> > 
> > Qualcomm QCA807X Ethernet PHY is PHY package of 2 or 5
> > IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and
> > 1000BASE-T PHY-s.
> > 
> > Document the required property to make the PHY package correctly
> > configure and work.
> > 
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> 
> I think this looks pretty decent, some minor comments.
> 
> > +  qcom,package-mode:
> > +    description: |
> > +      PHY package can be configured in 3 mode following this table:
> > +
> > +                    First Serdes mode       Second Serdes mode
> > +      Option 1      PSGMII for copper       Disabled
> > +                    ports 0-4
> > +      Option 2      PSGMII for copper       1000BASE-X / 100BASE-FX
> > +                    ports 0-4
> > +      Option 3      QSGMII for copper       SGMII for
> > +                    ports 0-3               copper port 4
> > +
> > +      PSGMII mode (option 1 or 2) is configured dynamically by the driver
> 
> I'd drop mention of the driver here, with s/by the driver//.
>

Sure.

> > +      based on the presence of a connected SFP device.
> > +    $ref: /schemas/types.yaml#/definitions/string
> > +    enum:
> > +      - qsgmii
> > +      - psgmii
> > +    default: psgmii
> > +
> > +  qcom,tx-driver-strength-milliwatt:
> 
> Is this a typo? Should not it be "drive-strength"? There's 39 mentions
> in tree of "driver-strength" and 3500 for "drive-strength".

In the PHY datasheet the reg is called TX_DRIVER and the description say
TX driver amplitude adjustment.

But the section is PSGMII/QSGMII drive control 1 register...

Guess it's a typo in the datasheet. Will change to drive.

> 
> Otherwise I think the review comments have been resolved:
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> 

Thanks!

-- 
	Ansuel