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Tue, 06 Feb 2024 10:51:52 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240206085238.1208256-1-tudor.ambarus@linaro.org> <20240206085238.1208256-5-tudor.ambarus@linaro.org> In-Reply-To: <20240206085238.1208256-5-tudor.ambarus@linaro.org> From: Sam Protsenko Date: Tue, 6 Feb 2024 12:51:41 -0600 Message-ID: Subject: Re: [PATCH 4/4] spi: s3c64xx: add support for google,gs101-spi To: Tudor Ambarus Cc: broonie@kernel.org, andi.shyti@kernel.org, krzysztof.kozlowski@linaro.org, alim.akhtar@samsung.com, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, kernel-team@android.com, willmcvicker@google.com, robh+dt@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, Feb 6, 2024 at 2:52=E2=80=AFAM Tudor Ambarus wrote: > > Add support for GS101 SPI. GS101 integrates 16 SPI nodes, all with 64 > bytes FIFOs. GS101 allows just 32 bit register accesses, otherwise a > Serror Interrupt is raised. Do the write reg accesses in 32 bits. > > Signed-off-by: Tudor Ambarus > --- Reviewed-by: Sam Protsenko > drivers/spi/spi-s3c64xx.c | 18 +++++++++++++++++- > 1 file changed, 17 insertions(+), 1 deletion(-) > > diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c > index cb45ad615f3d..9ad0d513fb30 100644 > --- a/drivers/spi/spi-s3c64xx.c > +++ b/drivers/spi/spi-s3c64xx.c > @@ -19,7 +19,7 @@ > #include > #include > > -#define MAX_SPI_PORTS 12 > +#define MAX_SPI_PORTS 16 > #define S3C64XX_SPI_QUIRK_CS_AUTO (1 << 1) > #define AUTOSUSPEND_TIMEOUT 2000 > > @@ -1538,6 +1538,19 @@ static const struct s3c64xx_spi_port_config fsd_sp= i_port_config =3D { > .quirks =3D S3C64XX_SPI_QUIRK_CS_AUTO, > }; > > +static const struct s3c64xx_spi_port_config gs101_spi_port_config =3D { > + .fifo_lvl_mask =3D { 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0= x7f, > + 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7= f}, > + .rx_lvl_offset =3D 15, > + .tx_st_done =3D 25, > + .clk_div =3D 4, > + .high_speed =3D true, > + .clk_from_cmu =3D true, > + .has_loopback =3D true, > + .use_32bit_io =3D true, > + .quirks =3D S3C64XX_SPI_QUIRK_CS_AUTO, > +}; > + > static const struct platform_device_id s3c64xx_spi_driver_ids[] =3D { > { > .name =3D "s3c2443-spi", > @@ -1550,6 +1563,9 @@ static const struct platform_device_id s3c64xx_spi_= driver_ids[] =3D { > }; > > static const struct of_device_id s3c64xx_spi_dt_match[] =3D { > + { .compatible =3D "google,gs101-spi", > + .data =3D &gs101_spi_port_config, > + }, > { .compatible =3D "samsung,s3c2443-spi", > .data =3D &s3c2443_spi_port_config, > }, > -- > 2.43.0.594.gd9cf4e227d-goog >