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From: Vinod Koul <vkoul@kernel.org>
To: joy.zou@nxp.com, Frank Li <Frank.Li@nxp.com>
Cc: devicetree@vger.kernel.org, dmaengine@vger.kernel.org, frank.li@nxp.com, 
 imx@lists.linux.dev, krzysztof.kozlowski+dt@linaro.org, 
 linux-kernel@vger.kernel.org, peng.fan@nxp.com, robh+dt@kernel.org, 
 shenwei.wang@nxp.com
In-Reply-To: <20231221153528.1588049-1-Frank.Li@nxp.com>
References: <20231221153528.1588049-1-Frank.Li@nxp.com>
Subject: Re: [PATCH v4 0/6] dmaengine: fsl-edma: integrate TCD64 support
 for 64bit physical address
Message-Id: <170729577399.88801.12960357287114595.b4-ty@kernel.org>
Date: Wed, 07 Feb 2024 09:49:33 +0100
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On Thu, 21 Dec 2023 10:35:22 -0500, Frank Li wrote:
> Change from v3 to v4.
> Fixed tcd64 type as fsl_edma_hw_tcd64
> 
> Change from v2 to v3:
>  - fix sparse build warning
> 
> Change from v1 to v2:
> - fixed mcf-edma-main.c build error.
> - fixed readq build error. readq actually is not atomic read in imx95.
> So split to two ioread32\iowrite32.
>   It needs read at least twice to avoid lower 32 bit part wrap during read
> up 32bit part.
> 
> [...]

Applied, thanks!

[1/6] dmaengine: fsl-edma: involve help macro fsl_edma_set(get)_tcd()
      commit: 5dc604455dcf20bdca639bf6b8ea2ea60d39c022
[2/6] dmaengine: fsl-edma: fix spare build warning
      commit: 537df9ab2d72bb782926a7d263a9f0a101e60b2e
[3/6] dmaengine: fsl-edma: add address for channel mux register in fsl_edma_chan
      commit: e0a08ed25492b6437e366b347113db484037b9b9
[4/6] dmaengine: mcf-edma: utilize edma_write_tcdreg() macro for TCD Access
      commit: b51dd7c8aac292396d038d0a9fb9c1589addb515
[5/6] dt-bindings: fsl-dma: fsl-edma: add fsl,imx95-edma5 compatible string
      commit: b7b8715b430ee4431bd675687c5bcda113e7ddd4
[6/6] dmaengine: fsl-edma: integrate TCD64 support for i.MX95
      commit: de7d9cb3b064fdfb2e0e7706d14ffee20b762ad2

Best regards,
-- 
~Vinod