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Thu, 8 Feb 2024 00:02:31 -0600 Received: from localhost (jluthra.dhcp.ti.com [172.24.227.217]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 41862Ujk002881; Thu, 8 Feb 2024 00:02:31 -0600 Date: Thu, 8 Feb 2024 11:32:30 +0530 From: Jai Luthra To: Nathan Morrisson CC: , , , , , , , , , , Subject: Re: [PATCH] arm64: dts: ti: am62-phyboard-lyra: Add overlay to enable a GPIO fan Message-ID: References: <20240207172820.478332-1-nmorrisson@phytec.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="mrmu7qla3hw4wr47" Content-Disposition: inline In-Reply-To: <20240207172820.478332-1-nmorrisson@phytec.com> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 --mrmu7qla3hw4wr47 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Nathan, Thanks for the patch. On Feb 07, 2024 at 09:28:20 -0800, Nathan Morrisson wrote: > The phyBOARD-Lyra has a GPIO fan header. This overlay enables the fan > header and sets the fan to turn on at 65C. >=20 > Signed-off-by: Nathan Morrisson > --- > arch/arm64/boot/dts/ti/Makefile | 1 + > .../ti/k3-am62-phyboard-lyra-gpio-fan.dtso | 51 +++++++++++++++++++ > 2 files changed, 52 insertions(+) > create mode 100644 arch/arm64/boot/dts/ti/k3-am62-phyboard-lyra-gpio-fan= =2Edtso >=20 > diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Mak= efile > index 52c1dc910308..379fb4f31a1f 100644 > --- a/arch/arm64/boot/dts/ti/Makefile > +++ b/arch/arm64/boot/dts/ti/Makefile > @@ -23,6 +23,7 @@ dtb-$(CONFIG_ARCH_K3) +=3D k3-am625-verdin-wifi-dev.dtb > dtb-$(CONFIG_ARCH_K3) +=3D k3-am625-verdin-wifi-mallow.dtb > dtb-$(CONFIG_ARCH_K3) +=3D k3-am625-verdin-wifi-yavia.dtb > dtb-$(CONFIG_ARCH_K3) +=3D k3-am62-lp-sk.dtb > +dtb-$(CONFIG_ARCH_K3) +=3D k3-am62-phyboard-lyra-gpio-fan.dtbo You can also add a compile time test, to check if this applies cleanly=20 on your phyboard base DTB. Please see the "Build time test only, enabled by CONFIG_OF_ALL_DTBS"=20 section below in this file. > =20 > # Boards with AM62Ax SoC > dtb-$(CONFIG_ARCH_K3) +=3D k3-am62a7-sk.dtb > diff --git a/arch/arm64/boot/dts/ti/k3-am62-phyboard-lyra-gpio-fan.dtso b= /arch/arm64/boot/dts/ti/k3-am62-phyboard-lyra-gpio-fan.dtso > new file mode 100644 > index 000000000000..9c05748bdd9d > --- /dev/null > +++ b/arch/arm64/boot/dts/ti/k3-am62-phyboard-lyra-gpio-fan.dtso > @@ -0,0 +1,51 @@ > +// SPDX-License-Identifier: GPL-2.0-only OR MIT > +/* > + * Copyright (C) 2024 PHYTEC America LLC > + * Author: Garrett Giordano > + */ > + > +/dts-v1/; > +/plugin/; > + > +#include > +#include > +#include "k3-pinctrl.h" > + > +&{/} { > + fan: gpio-fan { > + compatible =3D "gpio-fan"; > + gpio-fan,speed-map =3D <0 0 8600 1>; > + gpios =3D <&main_gpio0 40 GPIO_ACTIVE_LOW>; > + #cooling-cells =3D <2>; > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&gpio_fan_pins_default>; > + status =3D "okay"; > + }; > +}; > + > +&main_pmx0 { > + gpio_fan_pins_default: gpio-fan-default-pins { > + pinctrl-single,pins =3D < > + AM62X_IOPAD(0x0a4, PIN_OUTPUT, 7) /* (M22) GPMC0_DIR.GPIO0_40 */ > + >; > + }; > +}; > + > +&thermal_zones { > + main0_thermal: main0-thermal { > + trips { > + main0_thermal_trip0: main0-thermal-trip { > + temperature =3D <65000>; /* millicelsius */ > + hysteresis =3D <2000>; /* millicelsius */ > + type =3D "active"; > + }; > + }; > + > + cooling-maps { > + map0 { > + trip =3D <&main0_thermal_trip0>; > + cooling-device =3D <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > +}; > --=20 > 2.25.1 >=20 --=20 Thanks, Jai GPG Fingerprint: 4DE0 D818 E5D5 75E8 D45A AFC5 43DE 91F9 249A 7145 --mrmu7qla3hw4wr47 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEETeDYGOXVdejUWq/FQ96R+SSacUUFAmXEbnIACgkQQ96R+SSa cUUQCg/+PR53xujkTW+LArP7Z7bQT/dChxpQtnLtzYWoq5DAo3D2FoqwBmSEW5yU +MSvUERDwPStjqL7Tru6e5ZCg0CojSdmnnz5U5yv0/cn0G6AGf3Ts3nHK8DB53My 8rfNRhkYJG8gwUWB7TeoKlIVfPckM2ZUR1oW4K7k6mr7DpCR25FSuG0jiUNBIwXT THaa5WeBsa/0+r3SuFazWi/8mfnKQcl1qPUsNelb3QQZR9LOnmn7YwQuXT8DEHoH 96hQOchdqx63wEFxkngbwEE5iN6cDjuuXDDZ9RY1xtP8lki3NU0ll3GJg6toUQez 52zcJr6OhwkPLb6BjUnxROSVxfa17LGZRn/4hXbTqpuLsXtHmP8M8/vpiWCKRYQ8 YEf36rKMX4xfsmvFK7Aop0R9jA/RhbKLJMQ5D0viSUHIWegA/04yTfW/jw72XZsF zyiYwpKYNJi8VZSynmTgH4hfLAyVBgix1HdfmPpchkrxHF5uJmrMzDd1xvfFhkNk sN0DsQaHXZ8u+MaIH5UcG6MxUyBCVBFRLIzETccEMNHYo2LBdhv5/a0Xhg295KiW EAdL7zF5AsW/rS+eKrCYvj85CTdlEWxDP4zCkcmGjhlJSWVAn12zKIU4kI0GV2ID gafGCjR2RtYfbnPtsBefdxEdWEt+csSjUOrN7FVElsiHfB7m6U4= =2LXb -----END PGP SIGNATURE----- --mrmu7qla3hw4wr47--