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[2604:1380:45d1:ec00::1]) by mx.google.com with ESMTPS id w13-20020a05622a190d00b0042c331c13d3si2670181qtc.280.2024.02.07.22.11.33 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Feb 2024 22:11:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-57494-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=HFaz8r46; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-57494-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-57494-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 42DE01C233C2 for ; Thu, 8 Feb 2024 06:11:33 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 12B2067C7C; Thu, 8 Feb 2024 06:11:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="HFaz8r46" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 305C867C72; Thu, 8 Feb 2024 06:11:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707372685; cv=none; b=iheXGJ64L/iVsoY4EaADTpM4lcsoS7AgNyXSBFrj4yP8dfccLAlRd7yW3BGF71umjbWFL4b/Y7eLeOyuTE2VXb/Jy/foAkvOIB4DkuGtL4G7lmrYSWlhHK2MDhJq/0NgLBgW1JmXmA4kGMz1Ob0MfJLNP953cyKlU1zd9jVkEzQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707372685; c=relaxed/simple; bh=P03Ra6tKJeIfMl5vzZANDer57SEANPUYFQQ4fYeImD4=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=YlGEShY2FkDan++b5GXFcG9/18W1DXg6I0pSTh3+ADrp83/ykO/arVSERawKNKk1cBgEB3F2AVyecpowPjYAtzs7NzI32vMVJnGQLuHQHAzkpQkWhDQmfxjfwblZwLf2PrBf9ffIUbS2K2PcYDgQVLtSZcmC8wg3muPaTcj+XwU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=HFaz8r46; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id B2565C43390; Thu, 8 Feb 2024 06:11:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707372684; bh=P03Ra6tKJeIfMl5vzZANDer57SEANPUYFQQ4fYeImD4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=HFaz8r46F2yMGhc4eChQ1bdDMIG2SJbZeO1JsISVjZZY5/QxNPEU574sO9dknngXq YVgyAOL6RSp2qvuoFw3QAZnOLGr4cDN/wpbTmNQ58lmjGGeuChQIAye3TRo4TxFy79 V7xNv4sfFz+z0Vk0ON1uEn4vvWgR1e3+QhjIlA+1LT/Ifdm5+CkutQDtm79R+RIM1n 4OE0Gfs2UAKksR/gYZdixvQn5xW9+A4inVRJwU+VYyn9RWTX93+YzHhWEvbOkcDwIJ h9Gt9Ms2CBz13jyRvnX4bzQn20gjiMAXZmHcQEZQTyBICBjNVu3/zFAWUGyA2x/MG4 oI4EjuUTX0bdA== Date: Thu, 8 Feb 2024 08:10:59 +0200 From: Mike Rapoport To: David Hildenbrand Cc: linux-kernel@vger.kernel.org, linux-mm@kvack.org, Andrew Morton , Matthew Wilcox , Ryan Roberts , Russell King , Catalin Marinas , Will Deacon , Dinh Nguyen , Michael Ellerman , Nicholas Piggin , Christophe Leroy , "Aneesh Kumar K.V" , "Naveen N. Rao" , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexander Gordeev , Gerald Schaefer , Heiko Carstens , Vasily Gorbik , Christian Borntraeger , Sven Schnelle , "David S. Miller" , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org Subject: Re: [PATCH v3 01/15] arm64/mm: Make set_ptes() robust when OAs cross 48-bit boundary Message-ID: References: <20240129124649.189745-1-david@redhat.com> <20240129124649.189745-2-david@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240129124649.189745-2-david@redhat.com> On Mon, Jan 29, 2024 at 01:46:35PM +0100, David Hildenbrand wrote: > From: Ryan Roberts > > Since the high bits [51:48] of an OA are not stored contiguously in the > PTE, there is a theoretical bug in set_ptes(), which just adds PAGE_SIZE > to the pte to get the pte with the next pfn. This works until the pfn > crosses the 48-bit boundary, at which point we overflow into the upper > attributes. > > Of course one could argue (and Matthew Wilcox has :) that we will never > see a folio cross this boundary because we only allow naturally aligned > power-of-2 allocation, so this would require a half-petabyte folio. So > its only a theoretical bug. But its better that the code is robust > regardless. > > I've implemented pte_next_pfn() as part of the fix, which is an opt-in > core-mm interface. So that is now available to the core-mm, which will > be needed shortly to support forthcoming fork()-batching optimizations. > > Link: https://lkml.kernel.org/r/20240125173534.1659317-1-ryan.roberts@arm.com > Fixes: 4a169d61c2ed ("arm64: implement the new page table range API") > Closes: https://lore.kernel.org/linux-mm/fdaeb9a5-d890-499a-92c8-d171df43ad01@arm.com/ > Signed-off-by: Ryan Roberts > Reviewed-by: Catalin Marinas > Reviewed-by: David Hildenbrand > Signed-off-by: David Hildenbrand Reviewed-by: Mike Rapoport (IBM) > --- > arch/arm64/include/asm/pgtable.h | 28 +++++++++++++++++----------- > 1 file changed, 17 insertions(+), 11 deletions(-) > > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h > index b50270107e2f..9428801c1040 100644 > --- a/arch/arm64/include/asm/pgtable.h > +++ b/arch/arm64/include/asm/pgtable.h > @@ -341,6 +341,22 @@ static inline void __sync_cache_and_tags(pte_t pte, unsigned int nr_pages) > mte_sync_tags(pte, nr_pages); > } > > +/* > + * Select all bits except the pfn > + */ > +static inline pgprot_t pte_pgprot(pte_t pte) > +{ > + unsigned long pfn = pte_pfn(pte); > + > + return __pgprot(pte_val(pfn_pte(pfn, __pgprot(0))) ^ pte_val(pte)); > +} > + > +#define pte_next_pfn pte_next_pfn > +static inline pte_t pte_next_pfn(pte_t pte) > +{ > + return pfn_pte(pte_pfn(pte) + 1, pte_pgprot(pte)); > +} > + > static inline void set_ptes(struct mm_struct *mm, > unsigned long __always_unused addr, > pte_t *ptep, pte_t pte, unsigned int nr) > @@ -354,7 +370,7 @@ static inline void set_ptes(struct mm_struct *mm, > if (--nr == 0) > break; > ptep++; > - pte_val(pte) += PAGE_SIZE; > + pte = pte_next_pfn(pte); > } > } > #define set_ptes set_ptes > @@ -433,16 +449,6 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte) > return clear_pte_bit(pte, __pgprot(PTE_SWP_EXCLUSIVE)); > } > > -/* > - * Select all bits except the pfn > - */ > -static inline pgprot_t pte_pgprot(pte_t pte) > -{ > - unsigned long pfn = pte_pfn(pte); > - > - return __pgprot(pte_val(pfn_pte(pfn, __pgprot(0))) ^ pte_val(pte)); > -} > - > #ifdef CONFIG_NUMA_BALANCING > /* > * See the comment in include/linux/pgtable.h > -- > 2.43.0 > > -- Sincerely yours, Mike.