Received: by 2002:a05:7412:3b8b:b0:fc:a2b0:25d7 with SMTP id nd11csp137412rdb; Thu, 8 Feb 2024 01:07:47 -0800 (PST) X-Google-Smtp-Source: AGHT+IEfgfRvfbY+KYqnpPAnKOMb64BVDEobfFiKdlswkAE5OjRhoK2XfVAuRnnYbXCG4GDy5Ceu X-Received: by 2002:a50:f617:0:b0:55f:d7f8:1072 with SMTP id c23-20020a50f617000000b0055fd7f81072mr2009706edn.3.1707383267670; Thu, 08 Feb 2024 01:07:47 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707383267; cv=pass; d=google.com; s=arc-20160816; b=ljgnguvvDamb790VoQyxOBXfJzqxgc+oc0guG9PCWNamVGoFQQWz/eNWTNGawcnbt7 LmSXLOVpsEBLUQngqsBfCOouBdG6/y+hDtkJgoSPMHJGpmq8sCqLmDb2NUIcrUgszuYY DEC0Bpe3q4HhU4KqyetihrI44/HMfSo5iSwmZ+d+DS43UapijZjOI8aaU6BQw4JCDjgm aO39iQgK6TguUcHHAl/Vp2Ht75EkxSLKP/94kPspvLAZK/q0Igxr0SDGDoz/unu6qoKl 1LnyX7OloG0HL887MfeDo+9gincMYUXdYFGO3Vv6ULN5dkPR69pFlTEwspPfnK0oNdO6 O7WA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:date:message-id:dkim-signature; bh=MXPzNnfDYfLtAUOiy0VTkRebmv+Nk0swilKB3svJo28=; fh=H4YjgnUzifXwS6FUCbrDSpN8LOuU50dx4tBq9DZoGfg=; b=OYWPVp63e+kizPrOjZVTQkjCGItKUtAzq8gJpMEO/SB9BGJGvvYNybPpkUHglbLyPI HzVQYzIICflF78jHCWKrgGhsiyBMtFMR9R4DxQUahlNVhFoNnqZZZpnypGr6yO1VOGYh Vs/Lq+qGT//4zFkmg/q6WxVzNq4zgsz6DckISCBTnudoY+8XudiupPno4yjDBDq6SjQ+ 19UCgEh95zYRmMyJOLKBU+gAIpCVRRB6ccw6hOiVEK8KzRflqtomDAiZuXG7iPYVH6Am vYjWO3TxbzFXu8jHQe+G7E4H+UAk3iTZ35SMTiNLKWw7CHzIfH2FIJ3vI2wjVulVahEq FW7Q==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=nZ1Wviq9; arc=pass (i=1 spf=pass spfdomain=quicinc.com dkim=pass dkdomain=quicinc.com dmarc=pass fromdomain=quicinc.com); spf=pass (google.com: domain of linux-kernel+bounces-57692-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-57692-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com X-Forwarded-Encrypted: i=2; AJvYcCUh9JCDgbNXeTrf6jEeZlnjCLqjhIc5ouqxgjBRLIyNSjAORXNX0r1xW8OfW1NsBSVdOfzUr1iOtemtmOJ/mNaVRwOX7Gg3yzyf6O53/g== Return-Path: Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [147.75.80.249]) by mx.google.com with ESMTPS id w23-20020aa7cb57000000b0055f43af8a99si723288edt.350.2024.02.08.01.07.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Feb 2024 01:07:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-57692-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=nZ1Wviq9; arc=pass (i=1 spf=pass spfdomain=quicinc.com dkim=pass dkdomain=quicinc.com dmarc=pass fromdomain=quicinc.com); spf=pass (google.com: domain of linux-kernel+bounces-57692-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-57692-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 3ED921F22556 for ; Thu, 8 Feb 2024 09:07:47 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2BDB96A8A1; Thu, 8 Feb 2024 09:07:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="nZ1Wviq9" Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 722D267C7E; Thu, 8 Feb 2024 09:07:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707383253; cv=none; b=ACv8/yxag6OwUf6SdR+vUAov+YNilCC65jOXoRz6UbyWvghrMoi6ofPqQNtciYTk8TZ3hA6fwoDNyVqT/AOGJquiNShuz5n65NCeMLq+NmndiyK2F5VceEZEldL7Wz3oWZh8m16LOBTLwJ6swNd8sK7LAqS5IrDyhcwILoeOTJI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707383253; c=relaxed/simple; bh=wr0IKEn24HXWw9pmfAzATPfrrvs2K+Sf+3BDhov5A0A=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=sHEcq97CQY3QnGSOF6D4re3r9fredFZUGxxf1dp0Y2UZ7TJkG5/OAdQ//ghyrBNhCpXPMn+xH2xrLdb4TKq8ptdYMSOgxxxDzTRnfQQbIGEOMF4LoTwvJAPAfvli0v/82+ZI8DdXWL6xfVhoAks2HbIByubbLCrMlQg8PvcMFZc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=nZ1Wviq9; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 4188ZdA7029307; Thu, 8 Feb 2024 09:07:27 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= message-id:date:mime-version:subject:to:cc:references:from :in-reply-to:content-type:content-transfer-encoding; s= qcppdkim1; bh=MXPzNnfDYfLtAUOiy0VTkRebmv+Nk0swilKB3svJo28=; b=nZ 1Wviq9V3vAa5AVFTD0RAJq8wXDChHkui3M184QGIC+MWRkIAio772+0aFcQ2MEnt XIadVWJpYOIsjoXE1JuhUrMVKSkmCEvJB3ZXXiZA3bNe+rcNvfwTxEWMS4B+ZeDr 7JZZdG1LPzLgr53uOtuo6iU0qVJPaCV+j416l9xzUb+xY8DMIxak1PBW60RdPoFJ nCqHQeTx7fHAmC/idnx0/JPVqWXTc+zEvAduS1Ka5U57U7pfxn8EAA0HXnM67v78 RuU3EnJaim0pfVXDSeiKkimLq1Ty6E+1ur4eaSNpW33sAmbSJehgiRNGe5FDhAJ2 MX6mJSs/t1m3yeUmc2Kg== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3w4m3ah33n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 08 Feb 2024 09:07:26 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 41897DYd010805 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 8 Feb 2024 09:07:13 GMT Received: from [10.216.53.86] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 8 Feb 2024 01:07:10 -0800 Message-ID: <62bba89d-97b0-4129-8abe-6025790d9d13@quicinc.com> Date: Thu, 8 Feb 2024 14:37:07 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] arm64: dts: qcom: sa8295p: Enable tertiary controller and its 4 USB ports To: Dmitry Baryshkov , Konrad Dybcio , Krzysztof Kozlowski CC: Rob Herring , Bjorn Andersson , Conor Dooley , , , , , References: <20240206114745.1388491-1-quic_kriskura@quicinc.com> <20240206114745.1388491-3-quic_kriskura@quicinc.com> <0470a930-d629-4467-b619-58d3e76f59a7@quicinc.com> <7500f1f8-1d97-4fa9-a7cd-7dea0ad52e00@quicinc.com> Content-Language: en-US From: Krishna Kurapati PSSNV In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Oon_ABTvhis6GKHPhltr4YJPODAu-63e X-Proofpoint-GUID: Oon_ABTvhis6GKHPhltr4YJPODAu-63e X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-08_01,2024-02-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 suspectscore=0 bulkscore=0 lowpriorityscore=0 impostorscore=0 phishscore=0 mlxlogscore=804 adultscore=0 priorityscore=1501 malwarescore=0 spamscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402080048 On 2/8/2024 10:37 AM, Dmitry Baryshkov wrote: > On Thu, 8 Feb 2024 at 06:48, Krishna Kurapati PSSNV > wrote: >> >> >> >> On 2/8/2024 10:11 AM, Dmitry Baryshkov wrote: >>> On Thu, 8 Feb 2024 at 04:40, Krishna Kurapati PSSNV >>> wrote: >>>> On 2/6/2024 6:54 PM, Dmitry Baryshkov wrote: >>>>> On Tue, 6 Feb 2024 at 14:28, Krishna Kurapati PSSNV >>>>> wrote: >>>>>> >>>>>> >>>>>> >>>>>> On 2/6/2024 5:43 PM, Dmitry Baryshkov wrote: >>>>>>> On Tue, 6 Feb 2024 at 14:03, Krishna Kurapati wrote: >>>>>>>> >>>>>>>> Enable tertiary controller for SA8295P (based on SC8280XP). >>>>>>>> Add pinctrl support for usb ports to provide VBUS to connected peripherals. >>>>>>> >>>>>>> These are not just pinctrl entries. They hide VBUS regulators. Please >>>>>>> implement them properly as corresponding vbus regulators. >>>>>>> >>>>>> >>>>>> Hi Dmitry. Apologies, can you elaborate on your comment. I thought this >>>>>> implementation was fine as Konrad reviewed it in v13 [1]. I removed his >>>>>> RB tag as I made one change of dropping "_state" in labels. >>>>> >>>>> My comment is pretty simple: if I'm not mistaken, your DT doesn't >>>>> reflect your hardware design. >>>>> You have actual VBUS regulators driven by these GPIO pins. Is this correct? >>>>> If so, you should describe them properly in the device tree rather >>>>> than describing them just as USB host's pinctrl state. >>>>> >>>> >>>> Hi Dmitry, >>>> >>>> I have very little idea about the gpio controller regulators. I will >>>> go through it and see how I can implement it. I just found this : >>>> https://www.kernel.org/doc/Documentation/devicetree/bindings/regulator/gpio-regulator.txt >>> >>> Much simpler, it can be found at >>> Documentation/devicetree/bindings/regulator/fixed-regulator.yaml >> >> Thanks for the reference. >> >>> >>>> One query. If we model it as a regulator, do we need to add it as a >>>> supply and call regulator_enable in dwc3_qcom probe again ? >>> >>> Not in probe(), but yes. It needs to be enabled when the VBUS has to >>> be powered up, when the device is initialised or switched to the host >>> mode, and disabled when the VBUS has to be powered down, if the device >>> is being switched to the device mode. >>> >> >> Actually since we never go to device mode, can't we just stick to this >> pinctrl approach and skip turning on regulator in driver ? > > Scroll several emails back. DT should describe the hardware. Hardware > has VBUS regulators. > Hi Dmitry, I dug up the schematic and I see that the gpio's we are using in this patch are actually "Enable Pins" to an external chip that provides vbus to the peripherals connected. So from the perspective of SoC, it is a GPIO and not to be represented as a regulator I believe. Regards, Krishna,