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References: <20240208105243.128875-1-krzysztof.kozlowski@linaro.org>
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From: Sam Protsenko <semen.protsenko@linaro.org>
Date: Thu, 8 Feb 2024 06:41:10 -0600
Message-ID: <CAPLW+4n5LqENFgUZYDb2rF+Db59Ry4tdAfKLiL-W-ZG6mP=kjw@mail.gmail.com>
Subject: Re: [PATCH] arm64: dts: exynos: gs101: minor whitespace cleanup
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Peter Griffin <peter.griffin@linaro.org>, Rob Herring <robh@kernel.org>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, 
	Alim Akhtar <alim.akhtar@samsung.com>, linux-arm-kernel@lists.infradead.org, 
	linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, 
	linux-kernel@vger.kernel.org
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On Thu, Feb 8, 2024 at 4:55=E2=80=AFAM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> The DTS code coding style expects exactly one space before '{' and
> around '=3D' characters.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>

>  .../boot/dts/exynos/google/gs101-pinctrl.dtsi    |  2 +-
>  arch/arm64/boot/dts/exynos/google/gs101.dtsi     | 16 ++++++++--------
>  2 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101-pinctrl.dtsi b/arch/=
arm64/boot/dts/exynos/google/gs101-pinctrl.dtsi
> index e6a9776d4d62..a675f822acec 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/exynos/google/gs101-pinctrl.dtsi
> @@ -251,7 +251,7 @@ gph1: gph1-gpio-bank {
>                 #interrupt-cells =3D <2>;
>         };
>
> -       pcie0_clkreq: pcie0-clkreq-pins{
> +       pcie0_clkreq: pcie0-clkreq-pins {
>                 samsung,pins =3D "gph0-1";
>                 samsung,pin-function =3D <GS101_PIN_FUNC_2>;
>                 samsung,pin-pud =3D <GS101_PIN_PULL_UP>;
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/bo=
ot/dts/exynos/google/gs101.dtsi
> index c7a9e81d23b9..80cc933cca3d 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> @@ -73,7 +73,7 @@ cpu0: cpu@0 {
>                         compatible =3D "arm,cortex-a55";
>                         reg =3D <0x0000>;
>                         enable-method =3D "psci";
> -                       cpu-idle-states =3D  <&ANANKE_CPU_SLEEP>;
> +                       cpu-idle-states =3D <&ANANKE_CPU_SLEEP>;
>                         capacity-dmips-mhz =3D <250>;
>                         dynamic-power-coefficient =3D <70>;
>                 };
> @@ -83,7 +83,7 @@ cpu1: cpu@100 {
>                         compatible =3D "arm,cortex-a55";
>                         reg =3D <0x0100>;
>                         enable-method =3D "psci";
> -                       cpu-idle-states =3D  <&ANANKE_CPU_SLEEP>;
> +                       cpu-idle-states =3D <&ANANKE_CPU_SLEEP>;
>                         capacity-dmips-mhz =3D <250>;
>                         dynamic-power-coefficient =3D <70>;
>                 };
> @@ -93,7 +93,7 @@ cpu2: cpu@200 {
>                         compatible =3D "arm,cortex-a55";
>                         reg =3D <0x0200>;
>                         enable-method =3D "psci";
> -                       cpu-idle-states =3D  <&ANANKE_CPU_SLEEP>;
> +                       cpu-idle-states =3D <&ANANKE_CPU_SLEEP>;
>                         capacity-dmips-mhz =3D <250>;
>                         dynamic-power-coefficient =3D <70>;
>                 };
> @@ -103,7 +103,7 @@ cpu3: cpu@300 {
>                         compatible =3D "arm,cortex-a55";
>                         reg =3D <0x0300>;
>                         enable-method =3D "psci";
> -                       cpu-idle-states =3D  <&ANANKE_CPU_SLEEP>;
> +                       cpu-idle-states =3D <&ANANKE_CPU_SLEEP>;
>                         capacity-dmips-mhz =3D <250>;
>                         dynamic-power-coefficient =3D <70>;
>                 };
> @@ -113,7 +113,7 @@ cpu4: cpu@400 {
>                         compatible =3D "arm,cortex-a76";
>                         reg =3D <0x0400>;
>                         enable-method =3D "psci";
> -                       cpu-idle-states =3D  <&ENYO_CPU_SLEEP>;
> +                       cpu-idle-states =3D <&ENYO_CPU_SLEEP>;
>                         capacity-dmips-mhz =3D <620>;
>                         dynamic-power-coefficient =3D <284>;
>                 };
> @@ -123,7 +123,7 @@ cpu5: cpu@500 {
>                         compatible =3D "arm,cortex-a76";
>                         reg =3D <0x0500>;
>                         enable-method =3D "psci";
> -                       cpu-idle-states =3D  <&ENYO_CPU_SLEEP>;
> +                       cpu-idle-states =3D <&ENYO_CPU_SLEEP>;
>                         capacity-dmips-mhz =3D <620>;
>                         dynamic-power-coefficient =3D <284>;
>                 };
> @@ -133,7 +133,7 @@ cpu6: cpu@600 {
>                         compatible =3D "arm,cortex-x1";
>                         reg =3D <0x0600>;
>                         enable-method =3D "psci";
> -                       cpu-idle-states =3D  <&HERA_CPU_SLEEP>;
> +                       cpu-idle-states =3D <&HERA_CPU_SLEEP>;
>                         capacity-dmips-mhz =3D <1024>;
>                         dynamic-power-coefficient =3D <650>;
>                 };
> @@ -143,7 +143,7 @@ cpu7: cpu@700 {
>                         compatible =3D "arm,cortex-x1";
>                         reg =3D <0x0700>;
>                         enable-method =3D "psci";
> -                       cpu-idle-states =3D  <&HERA_CPU_SLEEP>;
> +                       cpu-idle-states =3D <&HERA_CPU_SLEEP>;
>                         capacity-dmips-mhz =3D <1024>;
>                         dynamic-power-coefficient =3D <650>;
>                 };
> --
> 2.34.1
>
>