Received: by 2002:a05:7412:3b8b:b0:fc:a2b0:25d7 with SMTP id nd11csp778258rdb; Fri, 9 Feb 2024 00:15:04 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVFxwGXE6IgIngYhmXBEOF70M/v3rRiQCPLYaXOnGKaOMxtU9x3JTXBJTsJsz5CMnTjgt0/n0cPGGH6HWhtH7SsxtWw+ZTNtNo3vk6pgA== X-Google-Smtp-Source: AGHT+IGPSo9iL+D8t4uvKY/GLtKwhGiPbQaIZf5JLJU7YsZJMpJTW2jjOIswJFDqDtb1AbT1qnqB X-Received: by 2002:a0c:dd10:0:b0:68c:a6e3:f4e8 with SMTP id u16-20020a0cdd10000000b0068ca6e3f4e8mr1077396qvk.23.1707466504585; Fri, 09 Feb 2024 00:15:04 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707466504; cv=pass; d=google.com; s=arc-20160816; b=lvMYOD7iH9QDtQyTK0cRqhS0cnqDl7TEVe2SJtAFxGLtPCX867vnEkhvo1Ee13GaLf YC+KRGQPoSz1PsecHg96MluqWeH3hxnUmOfJqFEzTBefpIYzfCn4FnIN8H1HpNSneLdK rTmap9pBA+DKM3vm8G48fsXFTwBOA0mWKG+mnQHEhlb/EWSIJpk6FXk46vHCemjy0Fwe OlS2uLCGzHzUoNg9y/eTxqsGN+qTi09yfuWBJLwhGF/ROyAyF4IJoP0b+Av2F94pYCL5 xPERKG9PKYhtnaQbQsHeHCOpX8cyZD2cAZWDtCpZEVIrYHZNQHU91TLF4LBFt4aYZ5Qt bUzw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:in-reply-to:organization:from :content-language:references:cc:to:subject:user-agent:mime-version :list-unsubscribe:list-subscribe:list-id:precedence:date:message-id :dkim-signature; bh=grcN/p2PvU3+4w86Zs8A+YRZygsyPGidp/gJveZKZcg=; fh=K5ixRD+oDxNIneSUCfKc6YmgXNAzY6MYvVg4u5x09Mk=; b=LTndR4tY2qDoly3YutqTdDBGg+f1OeIHf721hWD5AB+StFVzu3i0fpd50uKGpftRyj XPNP27HO6/AdmNva8AjJYuxuqw0GRa3bA3mcCYnrXUXttkHCJJL9zCq1EzXNlmoi+L9v R+sbbwb1FzSpjFBX+5PnQjTnZohOqkUH88DQ6KJURHFq8dPbrM8Z3lX5UnHTq1tz0oyq /yBMIkRR8S4ufxxh+mM2L7aGG2lGRYxR2lRObeCyCPV6hMA1s6H+rHK8F1IocNkTClEl MGNQFDNtAkhPIcCU0LOPSwNZsFHaUpRWLDIFS3JHhRaX25zz3fjrvFX7XCqWoIjsApIp 3UxA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=RW8Rm8j6; arc=pass (i=1 spf=pass spfdomain=intel.com dkim=pass dkdomain=intel.com dmarc=pass fromdomain=intel.com); spf=pass (google.com: domain of linux-kernel+bounces-59105-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-59105-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com X-Forwarded-Encrypted: i=2; AJvYcCXAtvzJ3xuJls2hVYw2QVGaxmBdFgi9xlt8vJnDGRcYGwSpgUk++GjvcelO1C/H+RKwpq4KMf0hBE1tIqAWyNA2aLZcUx5wZmCilkixIA== Return-Path: Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. [147.75.199.223]) by mx.google.com with ESMTPS id b3-20020a05620a118300b00785990ea69dsi1429801qkk.10.2024.02.09.00.15.04 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Feb 2024 00:15:04 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-59105-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) client-ip=147.75.199.223; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=RW8Rm8j6; arc=pass (i=1 spf=pass spfdomain=intel.com dkim=pass dkdomain=intel.com dmarc=pass fromdomain=intel.com); spf=pass (google.com: domain of linux-kernel+bounces-59105-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) smtp.mailfrom="linux-kernel+bounces-59105-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 57A861C21734 for ; Fri, 9 Feb 2024 08:15:04 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 33D8A65BC0; Fri, 9 Feb 2024 08:14:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="RW8Rm8j6" Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8148957303; Fri, 9 Feb 2024 08:14:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707466496; cv=none; b=kTSdGTigR0yIcWC4Y6QEog/sXkkklVMg5EDwpPUH/286yRjiL6OKCfVuATkLjOplMtqTQRqTRxHUcxfvYxZ8JBLPi95YICw1YfYtbtXYRmptSjNyNMbTpAnPy/97AVz3aPhRPExETCg5OXOqGpQRDw/Os9qdsdTo9kxcYC6rjys= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707466496; c=relaxed/simple; bh=odqYYfgwkzr9LdQp9Op8mRYllrVCWTdsitkPlh2e2hM=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=k1dRyP4Yl6YEeMrJHlijdnUnCUe5iyfpecz/C2oRN9maM1pDhUlmawjZMbMzUTxZ+JtnY6vZ6rZ0s8KIihM6/wqgCpK48zOCRyBCT/DmlfiksP8eS0VJdDupUNDiY2Oh0vDSM5Ih2aGoIQIMGOQc3LPaWkYF4G+qbsqKlXkaYLI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=RW8Rm8j6; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1707466495; x=1739002495; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=odqYYfgwkzr9LdQp9Op8mRYllrVCWTdsitkPlh2e2hM=; b=RW8Rm8j6IEcrZapXzOKQ8ni1GXO80wkjzKOacsD859KINJzm4ALvWLN6 R4IECHXJXiCMjXiHzMoAphl1tYtbEu6o6a0yBznkch6bX88DBbLkiPhql TrrU7T6aGq0R2RFn1pxyMgDcEoqU3pMp8Y3de8k9hYcTOG6atkBMzwuMW t5++JIbGdg+tc89M3v8ZQBkNPt75VAxAj8+DrWfoSbjjR8sqslHv+f5+u CzRRvAAj4jHDN7yfL3nt693SOKq8RzxMphy5pNQe5WFMwlHvAoGXiGO6J b68zx8wjth78OdIhr2zW66BE9+Q99a8NQm80QMAkLakRbnkoAQFmFVCGC g==; X-IronPort-AV: E=McAfee;i="6600,9927,10978"; a="18804147" X-IronPort-AV: E=Sophos;i="6.05,256,1701158400"; d="scan'208";a="18804147" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2024 00:14:54 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,256,1701158400"; d="scan'208";a="1889450" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO [10.0.2.15]) ([10.252.61.190]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2024 00:14:48 -0800 Message-ID: Date: Fri, 9 Feb 2024 10:14:44 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V5 01/12] perf/core: Add aux_pause, aux_resume, aux_start_paused To: Andi Kleen Cc: Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Heiko Carstens , Thomas Richter , Hendrik Brueckner , Suzuki K Poulose , Mike Leach , James Clark , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Yicong Yang , Jonathan Cameron , Will Deacon , Arnaldo Carvalho de Melo , Jiri Olsa , Namhyung Kim , Ian Rogers , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org References: <20240208113127.22216-1-adrian.hunter@intel.com> <20240208113127.22216-2-adrian.hunter@intel.com> Content-Language: en-US From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 9/02/24 02:13, Andi Kleen wrote: >> +static void __perf_event_aux_pause(struct perf_event *event, bool pause) >> +{ >> + if (pause) { >> + if (!READ_ONCE(event->aux_paused)) { >> + WRITE_ONCE(event->aux_paused, 1); >> + event->pmu->stop(event, PERF_EF_PAUSE); >> + } >> + } else { >> + if (READ_ONCE(event->aux_paused)) { >> + WRITE_ONCE(event->aux_paused, 0); >> + event->pmu->start(event, PERF_EF_RESUME); >> + } > > This doesn't look atomic. Either the READ/WRITE once are not needed, > or you need an actually atomic construct. Yes READ_ONCE / WRITE_ONCE is not really needed here. > >> + >> + rb = ring_buffer_get(event); >> + if (!rb) >> + return; >> + >> + local_irq_save(flags); >> + /* Guard against NMI, NMI loses here */ >> + if (READ_ONCE(rb->aux_in_pause_resume)) >> + goto out_restore; >> + WRITE_ONCE(rb->aux_in_pause_resume, 1); > > >> + barrier(); >> + __perf_event_aux_pause(event, pause); >> + barrier(); >> + WRITE_ONCE(rb->aux_in_pause_resume, 0); > > Dito. > The writes to rb->aux_in_pause_resume must be done only once. It might be possible to get away without WRITE_ONCE(), but really the compiler should be informed not to make assumptions.