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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SA1PR12MB7199.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: c8cdbccb-9a7d-4774-d36e-08dc2950f422 X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Feb 2024 09:24:44.9668 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: df1RV/BEsIjeKdlpb4fyweyd96UPdGzciOyU0KcbbeH/JcCOfEQYxFtFnRMOCP0qwcnU+nDZIrttVDVVGazfZg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8156 >> >=0A= >> > IMO, this seems like adding too much code to reduce the call length fo= r a=0A= >> > very specific case. If there aren't any strong opinion on this, I'm pl= anning to=0A= >> > leave this code as it is.=0A= >>=0A= >> a slight difference. if mem_count=3D=3D0 the result should always succee= d=0A= >> no matter nvgrace_gpu_map_device_mem() succeeds or not. Of course=0A= >> if it fails it's already a big problem probably nobody cares about the s= ubtle=0A= >> difference when reading non-exist range.=0A= >>=0A= >> but regarding to readability it's still clearer:=0A= >>=0A= >> if (mem_count)=0A= >>=A0=A0=A0=A0=A0=A0 nvgrace_gpu_map_and_read();=0A= >>=0A= >=0A= > The below has better flow imo vs conditionalizing the call to=0A= > map_and_read/write and subsequent error handling, but I don't think=0A= > either adds too much code.=A0 Thanks,=0A= >=0A= > Alex=0A= >=0A= > --- a/drivers/vfio/pci/nvgrace-gpu/main.c=0A= > +++ b/drivers/vfio/pci/nvgrace-gpu/main.c=0A= > @@ -429,6 +429,9 @@ nvgrace_gpu_map_and_read(struct nvgrace_gpu_vfio_pci_= core_device *nvdev,=0A= >=A0 =A0=A0=A0=A0=A0=A0 u64 offset =3D *ppos & VFIO_PCI_OFFSET_MASK;=0A= >=A0=A0 =A0=A0=A0=A0=A0 int ret;=0A= >=0A= > +=A0=A0=A0=A0=A0=A0 if (!mem_count)=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 return 0;=0A= > +=0A= > =A0=A0=A0=A0=A0=A0=A0 /*=0A= > =A0=A0=A0=A0=A0=A0=A0 * Handle read on the BAR regions. Map to the target= device memory=0A= > =A0=A0=A0=A0=A0=A0=A0=A0 * physical address and copy to the request read = buffer.=0A= > @@ -547,6 +550,9 @@ nvgrace_gpu_map_and_write(struct nvgrace_gpu_vfio_pci= _core_device *nvdev,=0A= > =A0=A0=A0=A0=A0=A0=A0 loff_t pos =3D *ppos & VFIO_PCI_OFFSET_MASK;=0A= > =A0=A0=A0=A0=A0=A0=A0 int ret;=0A= >=0A= > +=A0=A0=A0=A0=A0=A0 if (!mem_count)=0A= > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 return 0;=0A= > +=0A= > =A0=A0=A0=A0=A0=A0=A0 ret =3D nvgrace_gpu_map_device_mem(index, nvdev);= =0A= > =A0=A0=A0=A0=A0=A0=A0 if (ret)=0A= >=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 return ret;=0A= =0A= Sure, will update it as mentioned above.=