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bh=r9ptD/D9HY0EEOB5q1BgMMq6Q5nu3lZqkdrr6XOXEtM=; b=TblmMRHj8ys4E83aLcKqzdGJKPIgGW452Wvui72ocdhxpAVV9hp/jMzu IAWS3w7O+Ie1BGwvRdswKfn8ufSVEvGBp1Ab4yXbxJsCptlSSil15uBxd Yz5WhaBOt/c8e8yXwx959Qkv7NCE71RK/PsWOm2jBnC0WcAbv5C+qYWUQ fhpxmh1SaRmJLIJzm85Ntxl5ZScDdMiDdUYPsQ/KGLuMfESHywKAa3uy2 N79H//b8EdPieO1EA5VZLJkuI1UTRDGOGfUdbV8SluHlnDp9kzl09HIPL +PsSWGjLHkTM4jje7fypnS15QIhNUCgPDGeX3KL19Oab+TGeKSbGOi083 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10979"; a="4450972" X-IronPort-AV: E=Sophos;i="6.05,257,1701158400"; d="scan'208";a="4450972" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2024 09:52:45 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,257,1701158400"; d="scan'208";a="6746729" Received: from mfahimal-mobl2.amr.corp.intel.com (HELO [10.212.132.151]) ([10.212.132.151]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2024 09:52:44 -0800 Message-ID: <4f1d0c0369e3b08cb0c8d2271396277df6e1d37e.camel@linux.intel.com> Subject: Re: [PATCH v2] mm: swap: async free swap slot cache entries From: Tim Chen To: Chris Li Cc: "Huang, Ying" , Andrew Morton , linux-kernel@vger.kernel.org, linux-mm@kvack.org, Wei =?UTF-8?Q?Xu=EF=BF=BC?= , Yu =?UTF-8?Q?Zhao=EF=BF=BC?= , Greg Thelen , Chun-Tse Shao , Suren =?UTF-8?Q?Baghdasaryan=EF=BF=BC?= , Yosry =?UTF-8?Q?Ahmed=EF=BF=BC?= , Brain Geffon , Minchan Kim , Michal Hocko , Mel Gorman , Nhat Pham , Johannes Weiner , Kairui Song , Zhongkun He , Kemeng Shi , Barry Song Date: Fri, 09 Feb 2024 09:52:44 -0800 In-Reply-To: References: <20240131-async-free-v2-1-525f03e07184@kernel.org> <87sf2ceoks.fsf@yhuang6-desk2.ccr.corp.intel.com> <7f19b4d69ff20efe8260a174c7866b4819532b1f.camel@linux.intel.com> <1fa1da19b0b929efec46bd02a6fc358fef1b9c42.camel@linux.intel.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.44.4 (3.44.4-2.fc36) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Tue, 2024-02-06 at 17:51 -0800, Chris Li wrote: > On Tue, Feb 6, 2024 at 5:08=E2=80=AFPM Tim Chen wrote: > >=20 > > On Mon, 2024-02-05 at 11:10 -0800, Chris Li wrote: > > >=20 > > >=20 > > > In our system, a really heavy swap load is rare and it means somethin= g > > > is already wrong. At that point the app's SLO is likely at risk, > > > regardless of long tail swap latency. It is already too late to > > > address it at the swap fault end. We need to address the source of th= e > > > problem which is swapping out too much. > > >=20 > > >=20 > >=20 > > Could some usage scenarios put more pressure on swap than your > > usage scenario? Say system with limited RAM and rely on zswap? > >=20 > Of course. In that case what I proposed to do will already doing what > I think is the best of this situation. After grabbing the cache lock > and finding out async fre hasn't started the freeing yet. Just free > all 64 entries in the swap slot cache. It is similar to the old code > behavior. > Yes, it will have the long tail latency due to batch freeing 64 entries. > My point is not that I don't care about heavy swap behavior. > My point is that the app will suffer from the swap strom anyway, it is > unavoidable. That will be the dominant factor shadowing the batch free > optimization effect. The original optimization introducing swap_slots target such heavy swap use cases when we have fast swap backend to allow higher sustainable swap throughput. We should not ignore it. And I am afraid your current patch as is will hurt that performance. If you change the direct free path to free all entries, that could maintain the throughput and I'll be okay with that. >=20 > Or do I miss your point as you want to purpose the swap cache double > buffer so it can perform better under swap storm situations? >=20 I am not actually proposing doubling the buffer as that proposal have its own downside.=20 Tim