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([82.78.167.45]) by smtp.gmail.com with ESMTPSA id o13-20020a05600c4fcd00b0041047382b76sm790244wmq.37.2024.02.08.04.44.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Feb 2024 04:44:03 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, magnus.damm@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH 09/17] clk: renesas: r9a07g044: Add initial support for power domains Date: Thu, 8 Feb 2024 14:42:52 +0200 Message-Id: <20240208124300.2740313-10-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240208124300.2740313-1-claudiu.beznea.uj@bp.renesas.com> References: <20240208124300.2740313-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Claudiu Beznea Instantiate always-on power domain for R9A07G044 SoC. At the moment, all the IPs are part of this domain. Signed-off-by: Claudiu Beznea --- drivers/clk/renesas/r9a07g044-cpg.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/clk/renesas/r9a07g044-cpg.c b/drivers/clk/renesas/r9a07g044-cpg.c index 1047278c9079..3755e506fc65 100644 --- a/drivers/clk/renesas/r9a07g044-cpg.c +++ b/drivers/clk/renesas/r9a07g044-cpg.c @@ -443,6 +443,11 @@ static const unsigned int r9a07g044_no_pm_mod_clks[] = { MOD_CLK_BASE + R9A07G044_CRU_VCLK, }; +static const struct rzg2l_cpg_pm_domain_init_data r9a07g044_pm_domains[] = { + DEF_PD("always-on", R9A07G044_PD_ALWAYS_ON, 0, 0, + RZG2L_PD_F_PARENT | RZG2L_PD_F_ALWAYS_ON), +}; + #ifdef CONFIG_CLK_R9A07G044 const struct rzg2l_cpg_info r9a07g044_cpg_info = { /* Core Clocks */ @@ -468,6 +473,10 @@ const struct rzg2l_cpg_info r9a07g044_cpg_info = { .resets = r9a07g044_resets, .num_resets = R9A07G044_TSU_PRESETN + 1, /* Last reset ID + 1 */ + /* PM domains */ + .pm_domains = r9a07g044_pm_domains, + .num_pm_domains = ARRAY_SIZE(r9a07g044_pm_domains), + .has_clk_mon_regs = true, }; #endif @@ -497,6 +506,10 @@ const struct rzg2l_cpg_info r9a07g054_cpg_info = { .resets = r9a07g044_resets, .num_resets = R9A07G054_STPAI_ARESETN + 1, /* Last reset ID + 1 */ + /* PM domains */ + .pm_domains = r9a07g044_pm_domains, + .num_pm_domains = ARRAY_SIZE(r9a07g044_pm_domains), + .has_clk_mon_regs = true, }; #endif -- 2.39.2