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[209.85.219.175]) by smtp.gmail.com with ESMTPSA id l37-20020a25ad65000000b00dc230f91674sm1298716ybe.26.2024.02.12.08.24.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 12 Feb 2024 08:24:57 -0800 (PST) Received: by mail-yb1-f175.google.com with SMTP id 3f1490d57ef6-dcbbc41d3d5so419705276.3; Mon, 12 Feb 2024 08:24:57 -0800 (PST) X-Forwarded-Encrypted: i=1; AJvYcCVTPj5fGxYzBzb5YQUnTZVF2f4vM3MHoXLXRXXDdMLzrJsoGc+Dkbo8pyOeFCJLMSQ/Lgl0SpEyI666KVOorETX6gCzObFtWviuc8JoXouJCWbKr3u8aAJjtTwbZsS+JHH9dXga8paw812tPDmjUgmBQpvGe8dSYRj/gGScTBPfkt+P+gsKSd1UQdbx X-Received: by 2002:a25:aa6d:0:b0:dc6:d7de:5b29 with SMTP id s100-20020a25aa6d000000b00dc6d7de5b29mr5622636ybi.10.1707755097054; Mon, 12 Feb 2024 08:24:57 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240205144421.51195-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20240205144421.51195-2-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: <20240205144421.51195-2-prabhakar.mahadev-lad.rj@bp.renesas.com> From: Geert Uytterhoeven Date: Mon, 12 Feb 2024 17:24:45 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 1/3] dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Update interrupts To: Prabhakar Cc: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Biju Das , Claudiu Beznea , Lad Prabhakar Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Prabhakar, On Mon, Feb 5, 2024 at 3:44=E2=80=AFPM Prabhakar wrote: > From: Lad Prabhakar > > All the RZ/G2L and alike SoC's (listed below) have ECCRAM0/1 interrupts > supported by the IRQC block, reflect the same in DT binding doc. > > - R9A07G043U - RZ/G2UL > - R9A07G044L/R9A07G044LC - RZ/{G2L,G2LC} > - R9A07G054 - RZ/V2L > - R9A08G045 - RZ/G3S > > For the RZ/G3S SoC ("R9A08G045") ECCRAM0/1 interrupts combined into singl= e > interrupt so we just use the below to represent them: > - ec7tie1-0 > - ec7tie2-0 > - ec7tiovf-0 > > Previously, it was assumed that BUS-error and ECCRAM0/1 error interrupts > were only supported by RZ/G2UL ("R9A07G043U") and RZ/G3S ("R9A08G045") > SoCs. However, in reality, all RZ/G2L and similar SoCs (listed above) > support these interrupts. Therefore, mark the 'interrupt-names' property > as required for all the SoCs and update the example node in the binding > document. > > Fixes: 96fed779d3d4 ("dt-bindings: interrupt-controller: Add Renesas RZ/G= 2L Interrupt Controller") > Fixes: 1cf0697a24ef ("dt-bindings: interrupt-controller: renesas,rzg2l-ir= qc: Document RZ/G3S") > Signed-off-by: Lad Prabhakar Thanks for your patch! Reviewed-by: Geert Uytterhoeven > --- a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2= l-irqc.yaml > +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2= l-irqc.yaml > @@ -88,9 +88,15 @@ properties: > - description: GPIO interrupt, TINT30 > - description: GPIO interrupt, TINT31 > - description: Bus error interrupt > + - description: ECCRAM0 1bit error interrupt > + - description: ECCRAM0 2bit error interrupt > + - description: ECCRAM0 error overflow interrupt > + - description: ECCRAM1 1bit error interrupt > + - description: ECCRAM1 2bit error interrupt > + - description: ECCRAM1 error overflow interrupt > > interrupt-names: > - minItems: 41 > + minItems: 45 > items: > - const: nmi > - const: irq0 > @@ -134,6 +140,12 @@ properties: > - const: tint30 > - const: tint31 > - const: bus-err > + - const: ec7tie1-0 # For RZ/G3S SoC ("R9A08G045") ECCRAM0/1 inte= rrupts are combined into single interrupt. > + - const: ec7tie2-0 # For RZ/G3S SoC ("R9A08G045") ECCRAM0/1 inte= rrupts are combined into single interrupt. > + - const: ec7tiovf-0 # For RZ/G3S SoC ("R9A08G045") ECCRAM0/1 inte= rrupts are combined into single interrupt. These lines are indeed a bit long, and might become longer when newer SoCs are introduced. What about changing the descriptions instead, like - - description: ECCRAM0 1bit error interrupt + - description: ECCRAM0 or combined ECCRAM0/1 1bit error interrup= t ? Gr{oetje,eeting}s, Geert --=20 Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds