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Message-ID: <7482f19f-b340-482f-bdf6-a5a68aeaf09e@ti.com>
Date: Mon, 12 Feb 2024 10:33:35 -0600
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Subject: Re: [PATCH v2 0/7] Add tuning algorithm for delay chain
To: Francesco Dolcini <francesco@dolcini.it>
CC: Ulf Hansson <ulf.hansson@linaro.org>,
        Adrian Hunter
	<adrian.hunter@intel.com>, <linux-mmc@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>
References: <20240207011520.3128382-1-jm@ti.com>
 <20240211160232.GB4443@francesco-nb>
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From: Judith Mendez <jm@ti.com>
In-Reply-To: <20240211160232.GB4443@francesco-nb>
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Hi Francesco,

On 2/11/24 10:02 AM, Francesco Dolcini wrote:
> On Tue, Feb 06, 2024 at 07:15:13PM -0600, Judith Mendez wrote:
>> This patch series introduces a new tuning algorithm for
>> mmc. The new algorithm should be used when delay chain is
>> enabled. The ITAPDLY is selected from the largest passing
>> window and the buffer is not viewed as a circular buffer.
>> The new tuning algorithm is implemented as per the paper
>> published here [0] and has been tested on the following
> 
> Where is this `[0]`?

I must have missed linking the ref doc here, will add in next
iteration, thanks.

> 
>> platforms: AM62x SK, AM62A SK, AM62p SK, AM64x SK, and AM64x
>> EVM.
> 
> In the other patches you link some document, but I was not able to find
> anything related to AM62, can you provide some reference on this
> specific SOC?

This patch series fixes issues that affect all Sitara SoCs, not only
AM62x. However, I could use AM62x for reference, no problem.

> 
> Francesco
> 

~ Judith