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bh=1SdYRn3CWEK3dxlZPaRQcNWKE6YBcI2fKjJGdbWOJRk=; b=CZ5kAB/Hf4UtFoX61xHTUDT0fJ B9BqJ9om1X6C2Wq+KOHa/IsARGsafaYupQviQ+T6GZ0PvBg332qYLgT7SkL3yqGg+pNkzIA/MJRGY bXhTHhBb1w0zNfMq1RMbb42QU7vdS6kX3z63JhttSAuMbclxMRNidgYFAZNGsssiQW+I=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1rZhyc-007ckQ-DI; Tue, 13 Feb 2024 02:52:50 +0100 Date: Tue, 13 Feb 2024 02:52:50 +0100 From: Andrew Lunn To: Robert Marko Cc: hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, ansuelsmth@gmail.com, rmk+kernel@armlinux.org.uk, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next] net: phy: aquantia: clear PMD Global Transmit Disable bit during init Message-ID: References: <20240211181732.646311-1-robimarko@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240211181732.646311-1-robimarko@gmail.com> On Sun, Feb 11, 2024 at 07:16:41PM +0100, Robert Marko wrote: > PMD Global Transmit Disable bit should be cleared for normal operation. > This should be HW default, however I found that on Asus RT-AX89X that uses > AQR113C PHY and firmware 5.4 this bit is set by default. > > With this bit set the AQR cannot achieve a link with its link-partner and > it took me multiple hours of digging through the vendor GPL source to find > this out, so lets always clear this bit during .config_init() to avoid a > situation like this in the future. This all look sensible. My only question is, should we have core c45 code doing this? [Goes and looks at 802.3] O.K, so the Marvell PHY firmware appears to be broken. The standard says it should have a default value of 0, i.e. the transmitter should be enabled by default. So this is just a workaround for broken behaviour. > Signed-off-by: Robert Marko Reviewed-by: Andrew Lunn Andrew