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Tue, 13 Feb 2024 08:30:15 GMT Received: from [10.131.33.37] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 13 Feb 2024 00:30:11 -0800 Message-ID: Date: Tue, 13 Feb 2024 14:00:07 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 2/3] firmware: arm_scmi: Add support for marking certain frequencies as boost Content-Language: en-US To: Sudeep Holla CC: , , , , , , , , , , , , References: <20240117110443.2060704-1-quic_sibis@quicinc.com> <20240117110443.2060704-3-quic_sibis@quicinc.com> <20240131112507.fu355wnolbsoiqxn@bogus> From: Sibi Sankar In-Reply-To: <20240131112507.fu355wnolbsoiqxn@bogus> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 0BgYND4qgUQPRb4w_MYqK9jjanG_uF7u X-Proofpoint-ORIG-GUID: 0BgYND4qgUQPRb4w_MYqK9jjanG_uF7u X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-13_04,2024-02-12_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 clxscore=1015 lowpriorityscore=0 spamscore=0 impostorscore=0 mlxlogscore=999 bulkscore=0 priorityscore=1501 suspectscore=0 adultscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402130065 On 1/31/24 16:55, Sudeep Holla wrote: > On Wed, Jan 17, 2024 at 04:34:42PM +0530, Sibi Sankar wrote: >> All opps above the sustained level/frequency are treated as boost, so mark >> them accordingly. >> >> Suggested-by: Sudeep Holla >> Signed-off-by: Sibi Sankar >> --- >> drivers/firmware/arm_scmi/perf.c | 11 ++++++++++- >> 1 file changed, 10 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/firmware/arm_scmi/perf.c b/drivers/firmware/arm_scmi/perf.c >> index e286f04ee6e3..d3fb8c804b3d 100644 >> --- a/drivers/firmware/arm_scmi/perf.c >> +++ b/drivers/firmware/arm_scmi/perf.c >> @@ -811,7 +811,7 @@ static int scmi_dvfs_device_opps_add(const struct scmi_protocol_handle *ph, >> struct device *dev, u32 domain) >> { >> int idx, ret; >> - unsigned long freq; >> + unsigned long freq, sustained_freq; >> struct dev_pm_opp_data data = {}; >> struct perf_dom_info *dom; >> >> @@ -819,12 +819,21 @@ static int scmi_dvfs_device_opps_add(const struct scmi_protocol_handle *ph, >> if (IS_ERR(dom)) >> return PTR_ERR(dom); >> >> + if (!dom->level_indexing_mode) >> + sustained_freq = dom->sustained_perf_level * dom->mult_factor; >> + else >> + sustained_freq = dom->sustained_freq_khz * dom->mult_factor; >> + > > Can't we just use dom->sustained_freq_khz * 1000UL in both the cases ? sure, I retained sustained_perf_level because I wasn't sure how the sustained_perf_level would be populated in systems not using level indexing mode. > > Other than that this series looks good to me but it would be good to > explain how you would use this. Since it is enabled by default, do you > plan to disable boost at time and when ? If it is for thermal reasons, > why your other series handling thermal and limits notification from the > firmware not sufficient. Boost frequencies defined in X1E are achievable by only one CPU in a cluster i.e. either the other CPUs in the same cluster should be in low power mode or offline. So it's mostly for book keeping i.e. we wouldn't to intimate incorrectly that the CPUs are running at max possible frequency when it's actually running at a lower frequency. -Sibi >