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Date: Tue, 13 Feb 2024 09:31:49 +0100
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Subject: Re: [PATCH 2/2] pinctrl: qcom: sm8450: Add pll_clk to pin group 98
 for SM8475
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To: Danila Tikhonov <danila@jiaxyga.com>, andersson@kernel.org,
 konrad.dybcio@linaro.org, linus.walleij@linaro.org, robh@kernel.org,
 krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, vkoul@kernel.org
Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
References: <20240212191046.77013-1-danila@jiaxyga.com>
 <20240212191046.77013-3-danila@jiaxyga.com>
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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In-Reply-To: <20240212191046.77013-3-danila@jiaxyga.com>
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On 12/02/2024 20:10, Danila Tikhonov wrote:
> Add pll_clk to pin group 98 for compatibility with SM8475.

I don't understand this. What compatibility? Is it valid on SM8450? Ifi
so, then this would be fix. If not, then you just introduced incorrect
group for SM8450 and called it compatibility.

> 
> Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
> ---
>  drivers/pinctrl/qcom/pinctrl-sm8450.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pinctrl/qcom/pinctrl-sm8450.c b/drivers/pinctrl/qcom/pinctrl-sm8450.c
> index 617286711695..45ac8e72c1c7 100644
> --- a/drivers/pinctrl/qcom/pinctrl-sm8450.c
> +++ b/drivers/pinctrl/qcom/pinctrl-sm8450.c
> @@ -957,7 +957,7 @@ static const char * const pll_bist_groups[] = {
>  };
>  
>  static const char * const pll_clk_groups[] = {
> -	"gpio107",
> +	"gpio98", "gpio107",


Best regards,
Krzysztof