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[2003:f6:ef1b:2000:944c:cbc7:1e1c:2c47]) by smtp.gmail.com with ESMTPSA id br18-20020a170906d15200b00a38a868bcf7sm1112046ejb.41.2024.02.13.01.47.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Feb 2024 01:47:56 -0800 (PST) Message-ID: Subject: Re: [PATCH 5/5] iio: adc: ad7380: use spi_optimize_message() From: Nuno =?ISO-8859-1?Q?S=E1?= To: David Lechner , Mark Brown Cc: Martin Sperl , David Jander , Jonathan Cameron , Michael Hennerich , Nuno =?ISO-8859-1?Q?S=E1?= , Alain Volmat , Maxime Coquelin , Alexandre Torgue , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-iio@vger.kernel.org Date: Tue, 13 Feb 2024 10:51:15 +0100 In-Reply-To: <20240212-mainline-spi-precook-message-v1-5-a2373cd72d36@baylibre.com> References: <20240212-mainline-spi-precook-message-v1-0-a2373cd72d36@baylibre.com> <20240212-mainline-spi-precook-message-v1-5-a2373cd72d36@baylibre.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.50.3 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Mon, 2024-02-12 at 17:26 -0600, David Lechner wrote: > This modifies the ad7380 ADC driver to use spi_optimize_message() to > optimize the SPI message for the buffered read operation. Since buffered > reads reuse the same SPI message for each read, this can improve > performance by reducing the overhead of setting up some parts the SPI > message in each spi_sync() call. >=20 > Signed-off-by: David Lechner > --- > =C2=A0drivers/iio/adc/ad7380.c | 52 +++++++++++++++++++++++++++++++++++++= ++++------ > - > =C2=A01 file changed, 45 insertions(+), 7 deletions(-) >=20 > diff --git a/drivers/iio/adc/ad7380.c b/drivers/iio/adc/ad7380.c > index abd746aef868..5c5d2642a474 100644 > --- a/drivers/iio/adc/ad7380.c > +++ b/drivers/iio/adc/ad7380.c > @@ -133,6 +133,7 @@ struct ad7380_state { > =C2=A0 struct spi_device *spi; > =C2=A0 struct regulator *vref; > =C2=A0 struct regmap *regmap; > + struct spi_message *msg; > =C2=A0 /* > =C2=A0 * DMA (thus cache coherency maintenance) requires the > =C2=A0 * transfer buffers to live in their own cache lines. > @@ -231,19 +232,55 @@ static int ad7380_debugfs_reg_access(struct iio_dev > *indio_dev, u32 reg, > =C2=A0 return ret; > =C2=A0} > =C2=A0 > +static int ad7380_buffer_preenable(struct iio_dev *indio_dev) > +{ > + struct ad7380_state *st =3D iio_priv(indio_dev); > + struct spi_transfer *xfer; > + int ret; > + > + st->msg =3D spi_message_alloc(1, GFP_KERNEL); > + if (!st->msg) > + return -ENOMEM; > + > + xfer =3D list_first_entry(&st->msg->transfers, struct spi_transfer, > + transfer_list); > + > + xfer->bits_per_word =3D st->chip_info->channels[0].scan_type.realbits; > + xfer->len =3D 4; > + xfer->rx_buf =3D st->scan_data.raw; > + > + ret =3D spi_optimize_message(st->spi, st->msg); > + if (ret) { > + spi_message_free(st->msg); > + return ret; > + } > + > + return 0; > +} > + > +static int ad7380_buffer_postdisable(struct iio_dev *indio_dev) > +{ > + struct ad7380_state *st =3D iio_priv(indio_dev); > + > + spi_unoptimize_message(st->msg); > + spi_message_free(st->msg); > + > + return 0; > +} > + Not such a big deal but unless I'm missing something we could have the spi_message (+ the transfer) statically allocated in struct ad7380_state an= d do the optimize only once at probe (naturally with proper devm action for unoptimize). Then we would not need to this for every buffer enable + disab= le. I know in terms of performance it won't matter but it would be less code I gu= ess. Am I missing something? - Nuno S=C3=A1