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Date: Tue, 13 Feb 2024 14:02:24 +0100
From: Christian Marangi <ansuelsmth@gmail.com>
To: Robert Marko <robimarko@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>, andersson@kernel.org,
	konrad.dybcio@linaro.org, hkallweit1@gmail.com,
	linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com,
	kuba@kernel.org, pabeni@redhat.com, linux-arm-msm@vger.kernel.org,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next] net: phy: qca807x: move interface mode check to
 .config_init_once
References: <20240212115043.1725918-1-robimarko@gmail.com>
 <c97d10fa-39c5-4e5e-93ce-1610635cb4d4@lunn.ch>
 <CAOX2RU6OwiymM_O_62VETgkBNUQP1TuOKJmm0D1ZUXBA7ZPJNA@mail.gmail.com>
 <7c5dd47c-26b9-4a12-af93-6139ae85e864@lunn.ch>
 <CAOX2RU79o_5KRJZUJKA_++rrFXn66oLU0jOVHZnA1wHf2kA7RA@mail.gmail.com>
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On Tue, Feb 13, 2024 at 11:16:47AM +0100, Robert Marko wrote:
> On Mon, 12 Feb 2024 at 20:48, Andrew Lunn <andrew@lunn.ch> wrote:
> >
> > On Mon, Feb 12, 2024 at 07:09:04PM +0100, Robert Marko wrote:
> > > On Mon, 12 Feb 2024 at 15:51, Andrew Lunn <andrew@lunn.ch> wrote:
> > > >
> > > > On Mon, Feb 12, 2024 at 12:49:34PM +0100, Robert Marko wrote:
> > > > > Currently, we are checking whether the PHY package mode matches the
> > > > > individual PHY interface modes at PHY package probe time, but at that time
> > > > > we only know the PHY package mode and not the individual PHY interface
> > > > > modes as of_get_phy_mode() that populates it will only get called once the
> > > > > netdev to which PHY-s are attached to is being probed and thus this check
> > > > > will always fail and return -EINVAL.
> > > > >
> > > > > So, lets move this check to .config_init_once as at that point individual
> > > > > PHY interface modes should be populated.
> > > >
> > > > Just for my own understanding, not directly about this patch...
> > > >
> > > > priv->package_mode is about PSGMII vs QSGMII for one of the SERDES
> > > > interfaces? We expect the individual PHYs sharing that interface to
> > > > also indicate PSGMII or QSGMII?
> > >
> > > Yes, that is the idea, all of the individual PHY-s in the package
> > > should be indicating
> > > the same PHY interface mode.
> > >
> > > >
> > > > But what about the other SERDES, which can be connected to an SFP
> > > > cage. You would normally set that to SGMII, or 1000BaseX. When an SFP
> > > > module is inserted, the correct interface mode is then determined from
> > > > the contests of the EEPROM and the PCS needs to be reconfigured. So
> > > > i'm just wondering how this check works in this situation?
> > >
> > > I just went to retest SFP support and it works as intended, as soon as the SFP
> > > is inserted, PHY will get reconfigured to "combo" mode so that fifth PHY can
> > > support both fiber (100Base-FX or 1000Base-X) or regular copper connections.
> > >
> > > So, the check will not interfere with SFP support.
> >
> > So for the port with the SFP you also have phy-mode of PSGMII or
> > QSGMII? That then gets changed when the SFP is hot plugged?
> 
> Yes, that is correct and when SFP is plugged in it will be reconfigured
> by the driver into combo mode as that port can actually be used for fiber and
> copper at the same time by changing the priority.
>

Hi Andrew, just to make sure this doesn't get confused.

There is a HW limitation here and it's described in Documentation:

- In QSGMII mode the SFP Cage can't be connected or mounted physically
  as in this mode only 5 copper port can be connected, it would go
  against the HW design of the chip. In this configuration the first 4
  port are qsgmii and the 5th port is sgmii. (we enforce qsgmii on all
  ports out of simplicity to make sure we have a sane configuration in
  DT)

- In PSGMII mode the 5th port is always a combo port that can either be
  a copper port or a fiber port (with SFP cage). To set the 5th port to
  fiber mode, the mode has to be switched but the other 4 port are
  always copper.
  Also it's ok to set the initial PSGMII mode to 5 copper port as it
  will be changed as soon as a SFP cage is connected. (can't happen to
  have a device with both a copper port and a SFP cage connected to the
  5th port, it's one or the other. Again it would go against the HW
  design.

Hope it's clear now why the check was introduced and the HW limitation
of it as with the previous message one might think the 5th port is
totally separated and can go to his own mode (PSGMII or QSGMII)

-- 
	Ansuel