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Date: Tue, 13 Feb 2024 14:10:42 +0100
From: Andrew Lunn <andrew@lunn.ch>
To: Michal =?utf-8?B?Vm9rw6HEjQ==?= <michal.vokac@ysoft.com>
Cc: Shawn Guo <shawnguo@kernel.org>, Fabio Estevam <festevam@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	NXP Linux Team <linux-imx@nxp.com>, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
	Jonathan McDowell <noodles@earth.li>
Subject: Re: [PATCH 1/2] ARM: dts: imx6dl-yapp4: Fix the QCA switch register
 address
Message-ID: <e00ed8cb-f73d-48a6-9999-f5acd5a202a0@lunn.ch>
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On Tue, Feb 13, 2024 at 01:20:44PM +0100, Michal Vokáč wrote:
> On 12. 02. 24 17:08, Andrew Lunn wrote:
> > On Mon, Feb 12, 2024 at 04:23:41PM +0100, Michal Vokáč wrote:
> > > The switch address in the node name is in hex while the address in the reg
> > > property is decimal which is wrong. Fix that and write the reg address
> > > as a hexadecimal number.
> > 
> > This feels the wrong way around. The reg value is used by the kernel,
> > where as the node name is not. If the reg value was wrong, the switch
> > would not be found. If this file was tested, why did somebody not
> > notice the switch was missing?
> > 
> > Do you have the hardware? Can you confirm is really does not work
> > without this patch? Was 15b43e497ffd never actually tested?
> Yes, I have bunch of these boards all around my desk - we manufacture
> them. I am pretty sure I tested all the patches I have ever sent to
> the mailing list regarding these boards.
> 
> The fact is that the switch actually works regardless of the reg value.
> It worked prior to the 15b43e497ffd commit with address 0, it worked
> later on with the reg value 10 and it works now with reg value 0x10.

Ah, so that is the missing piece of information from the commit
message. That the reg value does not actually matter. Hence it is safe
to change it.

Please reword the commit message.

> I admit that my understanding of the MDIO bus and addressing of
> the connected external/internal devices is pretty limited. I have no
> answer to why it works like that but as you brought up your questions
> I would actually like to know as well.

My guess is, the switch assumes it has full access to all the
addresses on the bus. It probably uses a subset, but that subset is
hard coded. But the MDIO DT binding requires a valid reg value, so
something has to be used.

There are some devices which use a single address on the bus. The
mv88e6xxx can be strapped into such a mode, so you can have multiple
switches on the bus. The reg value is then used. But you can also
strap it so it takes over the whole bus, and uses #num_ports + 3
addresses on the bus, and those addresses are hard coded in the
silicon, so the reg value is ignored.

    Andrew

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