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([2a01:e0a:982:cbb0:6dfb:5e62:c51f:304b]) by smtp.gmail.com with ESMTPSA id q14-20020a05600c46ce00b0040fdf2832desm12195850wmo.12.2024.02.13.06.55.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 13 Feb 2024 06:55:57 -0800 (PST) Message-ID: <3fcb9f16-61f8-4544-a319-20496d5eb106@linaro.org> Date: Tue, 13 Feb 2024 15:55:56 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Neil Armstrong Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH RFC v2] spmi: pmic-arb: Add support for multiple buses Content-Language: en-US, fr To: Abel Vesa , Stephen Boyd , Matthias Brugger , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , AngeloGioacchino Del Regno Cc: Srini Kandagatla , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org References: <20240213-spmi-multi-master-support-v2-1-b3b102326906@linaro.org> Autocrypt: addr=neil.armstrong@linaro.org; keydata= xsBNBE1ZBs8BCAD78xVLsXPwV/2qQx2FaO/7mhWL0Qodw8UcQJnkrWmgTFRobtTWxuRx8WWP GTjuhvbleoQ5Cxjr+v+1ARGCH46MxFP5DwauzPekwJUD5QKZlaw/bURTLmS2id5wWi3lqVH4 BVF2WzvGyyeV1o4RTCYDnZ9VLLylJ9bneEaIs/7cjCEbipGGFlfIML3sfqnIvMAxIMZrvcl9 qPV2k+KQ7q+aXavU5W+yLNn7QtXUB530Zlk/d2ETgzQ5FLYYnUDAaRl+8JUTjc0CNOTpCeik 80TZcE6f8M76Xa6yU8VcNko94Ck7iB4vj70q76P/J7kt98hklrr85/3NU3oti3nrIHmHABEB AAHNKk5laWwgQXJtc3Ryb25nIDxuZWlsLmFybXN0cm9uZ0BsaW5hcm8ub3JnPsLAkQQTAQoA OwIbIwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgBYhBInsPQWERiF0UPIoSBaat7Gkz/iuBQJk Q5wSAhkBAAoJEBaat7Gkz/iuyhMIANiD94qDtUTJRfEW6GwXmtKWwl/mvqQtaTtZID2dos04 YqBbshiJbejgVJjy+HODcNUIKBB3PSLaln4ltdsV73SBcwUNdzebfKspAQunCM22Mn6FBIxQ GizsMLcP/0FX4en9NaKGfK6ZdKK6kN1GR9YffMJd2P08EO8mHowmSRe/ExAODhAs9W7XXExw UNCY4pVJyRPpEhv373vvff60bHxc1k/FF9WaPscMt7hlkbFLUs85kHtQAmr8pV5Hy9ezsSRa GzJmiVclkPc2BY592IGBXRDQ38urXeM4nfhhvqA50b/nAEXc6FzqgXqDkEIwR66/Gbp0t3+r yQzpKRyQif3OwE0ETVkGzwEIALyKDN/OGURaHBVzwjgYq+ZtifvekdrSNl8TIDH8g1xicBYp QTbPn6bbSZbdvfeQPNCcD4/EhXZuhQXMcoJsQQQnO4vwVULmPGgtGf8PVc7dxKOeta+qUh6+ SRh3vIcAUFHDT3f/Zdspz+e2E0hPV2hiSvICLk11qO6cyJE13zeNFoeY3ggrKY+IzbFomIZY 4yG6xI99NIPEVE9lNBXBKIlewIyVlkOaYvJWSV+p5gdJXOvScNN1epm5YHmf9aE2ZjnqZGoM Mtsyw18YoX9BqMFInxqYQQ3j/HpVgTSvmo5ea5qQDDUaCsaTf8UeDcwYOtgI8iL4oHcsGtUX oUk33HEAEQEAAcLAXwQYAQIACQUCTVkGzwIbDAAKCRAWmrexpM/4rrXiB/sGbkQ6itMrAIfn M7IbRuiSZS1unlySUVYu3SD6YBYnNi3G5EpbwfBNuT3H8//rVvtOFK4OD8cRYkxXRQmTvqa3 3eDIHu/zr1HMKErm+2SD6PO9umRef8V82o2oaCLvf4WeIssFjwB0b6a12opuRP7yo3E3gTCS KmbUuLv1CtxKQF+fUV1cVaTPMyT25Od+RC1K+iOR0F54oUJvJeq7fUzbn/KdlhA8XPGzwGRy 4zcsPWvwnXgfe5tk680fEKZVwOZKIEuJC3v+/yZpQzDvGYJvbyix0lHnrCzq43WefRHI5XTT QbM0WUIBIcGmq38+OgUsMYu4NzLu7uZFAcmp6h8g Organization: Linaro Developer Services In-Reply-To: <20240213-spmi-multi-master-support-v2-1-b3b102326906@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 13/02/2024 15:41, Abel Vesa wrote: > The v7 HW supports currently 2 buses. So register each bus as a separate > spmi controller and adapt all ops to use the bus instead of the > arbitrator. Legacy mode is still supported as long as there is no child > node that represents a bus, instead all nodes are expected to be actual > slave devices. > > Signed-off-by: Abel Vesa > --- > Changes in v2: > - Reworked it so that it registers a spmi controller for each bus > rather than relying on the generic framework to pass on the bus > (master) id. Thanks, I think this is better. > - Link to v1: https://lore.kernel.org/r/20240207-spmi-multi-master-support-v1-0-ce57f301c7fd@linaro.org > --- > drivers/spmi/spmi-pmic-arb.c | 950 ++++++++++++++++++++++++++----------------- > 1 file changed, 585 insertions(+), 365 deletions(-) > > diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c > index 9ed1180fe31f..eced35b712b4 100644 > --- a/drivers/spmi/spmi-pmic-arb.c > +++ b/drivers/spmi/spmi-pmic-arb.c > +static int spmi_pmic_arb_bus_init(struct platform_device *pdev, > + struct device_node *node, > + struct spmi_pmic_arb *pmic_arb) > +{ > + int bus_index = pmic_arb->buses_available; > + struct spmi_pmic_arb_bus *bus = &pmic_arb->buses[bus_index]; > + struct device *dev = &pdev->dev; > + struct spmi_controller *ctrl; > + void __iomem *intr; > + void __iomem *cnfg; > + int index, ret; > + u32 irq; > + > + ctrl = devm_spmi_controller_alloc(dev, sizeof(*ctrl)); > + if (IS_ERR(ctrl)) > + return PTR_ERR(ctrl); > + > + ctrl->cmd = pmic_arb_cmd; > + ctrl->read_cmd = pmic_arb_read_cmd; > + ctrl->write_cmd = pmic_arb_write_cmd; > + > + bus = spmi_controller_get_drvdata(ctrl); > + bus->spmic = ctrl; > + > + bus->ppid_to_apid = devm_kcalloc(dev, PMIC_ARB_MAX_PPID, > + sizeof(*bus->ppid_to_apid), > + GFP_KERNEL); > + if (!bus->ppid_to_apid) > + return -ENOMEM; > + > + bus->apid_data = devm_kcalloc(dev, pmic_arb->max_periphs, > + sizeof(*bus->apid_data), > + GFP_KERNEL); > + if (!bus->apid_data) > + return -ENOMEM; > + > + /* Optional property for v7: */ > + of_property_read_u32(node, "qcom,bus-id", &bus_index); Not sure what bindings you plan to use, but this should be the reg property. > + if (bus_index != pmic_arb->buses_available) { > + dev_err(dev, "wrong bus-id value"); > + return -EINVAL; > + } > + > + index = of_property_match_string(node, "reg-names", "cnfg"); > + if (index < 0) { > + dev_err(dev, "cnfg reg region missing"); > + return -EINVAL; > + } > + > + cnfg = devm_of_iomap(dev, node, index, NULL); > + if (IS_ERR(cnfg)) > + return PTR_ERR(cnfg); > + > + index = of_property_match_string(node, "reg-names", "intr"); > + if (index < 0) { > + dev_err(dev, "intr reg region missing"); > + return -EINVAL; > + } > + > + intr = devm_of_iomap(dev, node, index, NULL); > + if (IS_ERR(intr)) > + return PTR_ERR(intr); > + > + irq = of_irq_get_byname(node, "periph_irq"); > + if (irq < 0) > + return irq; > + > + bus->pmic_arb = pmic_arb; > + bus->intr = intr; > + bus->cnfg = cnfg; > + bus->irq = irq; > + bus->id = bus_index; > + > + ret = pmic_arb->ver_ops->init_apid(bus, index); > + if (ret) > + return ret; > + > + dev_dbg(&pdev->dev, "adding irq domain for bus %d\n", bus_index); > + > + bus->domain = irq_domain_add_tree(dev->of_node, > + &pmic_arb_irq_domain_ops, bus); > + if (!bus->domain) { > + dev_err(&pdev->dev, "unable to create irq_domain\n"); > + return -ENOMEM; > + } > + > + irq_set_chained_handler_and_data(bus->irq, > + pmic_arb_chained_irq, bus); > + > + bus->spmic->dev.of_node = node; > + dev_set_name(&bus->spmic->dev, "spmi-%d", bus_index); > + > + ret = devm_spmi_controller_add(dev, bus->spmic); > + if (ret) > + return ret; > + > + pmic_arb->buses_available++; > + > + return 0; > +} > + > +static int spmi_pmic_arb_register_buses(struct spmi_pmic_arb *pmic_arb, > + struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + struct device_node *node = dev->of_node; > + struct device_node *child; > + int ret; > + > + for_each_available_child_of_node(node, child) > + if (of_node_name_eq(child, "bus")) { It seems you use "bus" subnodes, it seems you should also submit a new bindings scheme for v7 controllers with subnodes > + ret = spmi_pmic_arb_bus_init(pdev, child, pmic_arb); > + if (ret) > + return ret; > + } > + > + if (!pmic_arb->buses_available) > + ret = spmi_pmic_arb_bus_init(pdev, node, pmic_arb); > + > + return ret; > +} > + > +static void spmi_pmic_arb_deregister_buses(struct spmi_pmic_arb *pmic_arb) > +{ > + int i; > + > + for (i = 0; i < pmic_arb->buses_available; i++) { > + struct spmi_pmic_arb_bus *bus = &pmic_arb->buses[i]; > + > + irq_set_chained_handler_and_data(bus->irq, > + NULL, NULL); > + irq_domain_remove(bus->domain); > + } > +} > + Overall the patch is __huge__, could you split it ? Like move the bus handling then add the multi-bus support in separate patches ? But first please add new bindings first so we know what you expect from DT. Thanks, Neil > > --- > base-commit: 445a555e0623387fa9b94e68e61681717e70200a > change-id: 20240207-spmi-multi-master-support-832a704b779b > > Best regards,