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Message-ID: <28db06e1-e5a3-4b49-bb7a-fb3fbfe5e5d0@quicinc.com>
Date: Wed, 14 Feb 2024 11:28:48 +0530
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Subject: Re: [PATCH 4/5] clk: qcom: camcc-sm8650: Add camera clock controller
 driver for SM8650
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To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
CC: Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
        Bjorn Andersson
	<andersson@kernel.org>,
        Konrad Dybcio <konrad.dybcio@linaro.org>,
        "Michael
 Turquette" <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>, "Rob
 Herring" <robh@kernel.org>,
        Krzysztof Kozlowski
	<krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
        Taniya Das
	<quic_tdas@quicinc.com>, <linux-arm-msm@vger.kernel.org>,
        <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>,
        Imran Shaik <quic_imrashai@quicinc.com>,
        "Ajit Pandey" <quic_ajipan@quicinc.com>
References: <20240206113145.31096-1-quic_jkona@quicinc.com>
 <20240206113145.31096-5-quic_jkona@quicinc.com>
 <edc9fa59-5f39-4f47-8647-242a9b0a8cb4@linaro.org>
 <e5c484cc-7624-40fd-a527-8cfcbf7784fe@quicinc.com>
 <CAA8EJpqjU-RDwPH6xGLa7xzcyxmU+86mX0X+DL09SJ0uVB5_CQ@mail.gmail.com>
From: Jagadeesh Kona <quic_jkona@quicinc.com>
In-Reply-To: <CAA8EJpqjU-RDwPH6xGLa7xzcyxmU+86mX0X+DL09SJ0uVB5_CQ@mail.gmail.com>
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On 2/12/2024 6:46 PM, Dmitry Baryshkov wrote:
> On Mon, 12 Feb 2024 at 15:09, Jagadeesh Kona <quic_jkona@quicinc.com> wrote:
>>
>>
>>
>> On 2/7/2024 6:41 PM, Bryan O'Donoghue wrote:
>>> On 06/02/2024 11:31, Jagadeesh Kona wrote:
>>>> Add support for the camera clock controller for camera clients to be
>>>> able to request for camcc clocks on SM8650 platform.
>>>>
>>>> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
>>>
>>>> +static struct clk_rcg2 cam_cc_mclk1_clk_src = {
>>>> +    .cmd_rcgr = 0x1501c,
>>>> +    .mnd_width = 8,
>>>> +    .hid_width = 5,
>>>> +    .parent_map = cam_cc_parent_map_1,
>>>> +    .freq_tbl = ftbl_cam_cc_mclk0_clk_src,
>>>> +    .clkr.hw.init = &(const struct clk_init_data) {
>>>> +        .name = "cam_cc_mclk1_clk_src",
>>>> +        .parent_data = cam_cc_parent_data_1,
>>>> +        .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
>>>> +        .flags = CLK_SET_RATE_PARENT,
>>>> +        .ops = &clk_rcg2_shared_ops,
>>>
>>> Nice.
>>>
>>> I compared this to WIP for x1e80100 which looks nearly register
>>> compatible. Use of the shared_ops indicates to me you've thought about
>>> which clocks should not be switched all the way off.
>>>
>>
>> Thanks Bryan for your review, We want all RCG's to be parked at safe
>> config(XO) when they are disabled, hence using shared ops for all the
>> RCG's.
> 
> What is the reason for parking it instead of fully disabling the clock?
> 

We don't do anything explicit in RCG disable, normally when all branch 
clocks are disabled, RCG gets disabled in HW. But as per the HW design 
recommendation, RCG needs to be parked at a safe clock source(XO) during 
disable path, hence we use shared_ops to achieve the same. After parking 
at XO, RCG gets disabled as all the branches are disabled.

Thanks,
Jagadeesh

>>
>>
>>>> +static struct platform_driver cam_cc_sm8650_driver = {
>>>> +    .probe = cam_cc_sm8650_probe,
>>>> +    .driver = {
>>>> +        .name = "cam_cc-sm8650",
>>>
>>> That said .. please fix the name here "cam_cc-sm8650". The title of your
>>> series is "camcc-sm8650" which IMO is a much more appropriate name.
>>>
>>> The admixture of hyphen "-" and underscore "_" is some kind of
>>> tokenisation sin.
>>>
>>
>> Sure, will fix this in next series.
>>
>> Thanks,
>> Jagadeesh
>>
>>> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
>>
> 
>