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Wed, 14 Feb 2024 10:10:09 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1707901810; bh=3YwKRfcPdFsjeEMhHnvS47aZ2jLEkh8n77Xdcl6IJK4=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=vlDXD7CUtsM3S/0Kz1c/9k/2uJ15zie2ru4qiPbPFxnFfRO9QmlO5MsDt9J9HxZ5+ 00K9e0JtFYQyp0FLB2F/wiupPQvvJIJZ8G40b0q9WHcscXp00bLhCcPjQb5rdprG+g s2EfB4gNZNBwmG75ASpDPFl63dc9oQbzy363A5nM= Message-ID: Date: Wed, 14 Feb 2024 11:10:09 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add support for common1 region Content-Language: en-US To: Devarsh Thakkar Cc: praneeth@ti.com, nm@ti.com, vigneshr@ti.com, a-bhatia1@ti.com, j-luthra@ti.com, kristo@kernel.org, jyri.sarha@iki.fi, airlied@gmail.com, daniel@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20240115125716.560363-1-devarsht@ti.com> <20240115125716.560363-2-devarsht@ti.com> From: Tomi Valkeinen Autocrypt: addr=tomi.valkeinen@ideasonboard.com; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi, On 15/01/2024 14:57, Devarsh Thakkar wrote: > TI keystone display subsystem present in AM65 and other SoCs such as AM62 > support two separate register spaces namely "common" and "common1" which > can be used by two separate hosts to program the display controller as > described in respective Technical Reference Manuals [1]. > > The common1 register space has similar set of configuration registers as > supported in common register space except the global configuration > registers which are exclusive to common region. > > This adds binding for "common1" register region too as supported by the > hardware. > > [1]: > AM62x TRM: > https://www.ti.com/lit/pdf/spruiv7 (Section 14.8.9.1 DSS Registers) > > AM65x TRM: > https://www.ti.com/lit/pdf/spruid7 (Section 12.6.5 DSS Registers) > > Signed-off-by: Devarsh Thakkar > --- > .../devicetree/bindings/display/ti/ti,am65x-dss.yaml | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml > index b6767ef0d24d..55e3e490d0e6 100644 > --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml > +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml > @@ -37,6 +37,7 @@ properties: > - description: OVR2 overlay manager for vp2 > - description: VP1 video port 1 > - description: VP2 video port 2 > + - description: common1 DSS register area > > reg-names: > items: > @@ -47,6 +48,7 @@ properties: > - const: ovr2 > - const: vp1 > - const: vp2 > + - const: common1 > > clocks: > items: > @@ -147,9 +149,10 @@ examples: > <0x04a07000 0x1000>, /* ovr1 */ > <0x04a08000 0x1000>, /* ovr2 */ > <0x04a0a000 0x1000>, /* vp1 */ > - <0x04a0b000 0x1000>; /* vp2 */ > + <0x04a0b000 0x1000>, /* vp2 */ > + <0x04a01000 0x1000>; /* common1 */ > reg-names = "common", "vidl1", "vid", > - "ovr1", "ovr2", "vp1", "vp2"; > + "ovr1", "ovr2", "vp1", "vp2", "common1"; > ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>; > power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>; > clocks = <&k3_clks 67 1>, Looks fine to me, I'll apply to drm-misc-next. Tomi