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Wysocki" , Andrew Davis , Dhruva Gole , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 1/3] dt-bindings: cpufreq: Add nvmem-cells for chip information Message-ID: <20240215083601.33dye7nypov2cz54@vireshk-i7> References: <20240206145721.2418893-1-msp@baylibre.com> <20240206145721.2418893-2-msp@baylibre.com> <20240215072653.lscrdrmsges3psmc@vireshk-i7> <46645341-1484-42d8-8540-580b586e2315@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <46645341-1484-42d8-8540-580b586e2315@linaro.org> On 15-02-24, 09:25, Krzysztof Kozlowski wrote: > On 15/02/2024 08:26, Viresh Kumar wrote: > > On 06-02-24, 15:57, Markus Schneider-Pargmann wrote: > >> Add nvmem-cells to describe chip information like chipvariant and > >> chipspeed. If nvmem-cells are used, the syscon property is not necessary > >> anymore. > >> > >> Signed-off-by: Markus Schneider-Pargmann > >> Acked-by: Andrew Davis > > > > Rob, > > > > Can you please review / Ack this one ? > > Done now, although it is not aligned with DTS in this patchset, so this > does not look tested... I will wait for them to be fixed then. -- viresh