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AJvYcCWvxXBRkOTR7u085J+N4jt2W5Y45DkWgn5dO4ktmM3vaL7WqpLNCgTnW0bE/pqTKhv/qKX21OrQi5kSWAU2aQEQ/+x6VvwPHZZjJlab X-Gm-Message-State: AOJu0YxSAq7afD+iFzd9lGuW+Ru/5ODfiTfqT8Pe2pFAGwyIhx84R+EN gUEUBDvyC+NjTZqUc58w8jEryJ7AyaKRdR/DdlvEo37X6h/cYF+hOrHjd7AZAEfj33RtEi5p2fz hVkPLRAekdVgn1o7Ny+3cL/YBLxZXeMYXEY8MTA== X-Received: by 2002:a25:d68b:0:b0:dc6:aed5:718a with SMTP id n133-20020a25d68b000000b00dc6aed5718amr968831ybg.26.1707989541228; Thu, 15 Feb 2024 01:32:21 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240215-topic-sm8650-gpu-v2-0-6be0b4bf2e09@linaro.org> <20240215-topic-sm8650-gpu-v2-2-6be0b4bf2e09@linaro.org> In-Reply-To: From: Dmitry Baryshkov Date: Thu, 15 Feb 2024 11:32:10 +0200 Message-ID: Subject: Re: [PATCH v2 2/6] dt-bindings: arm-smmu: Document SM8650 GPU SMMU To: neil.armstrong@linaro.org Cc: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Will Deacon , Robin Murphy , Joerg Roedel , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev Content-Type: text/plain; charset="UTF-8" On Thu, 15 Feb 2024 at 11:29, Neil Armstrong wrote: > > On 15/02/2024 10:25, Dmitry Baryshkov wrote: > > On Thu, 15 Feb 2024 at 11:20, Neil Armstrong wrote: > >> > >> Document the GPU SMMU found on the SM8650 platform. > >> > >> Signed-off-by: Neil Armstrong > >> --- > >> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 7 +++++-- > >> 1 file changed, 5 insertions(+), 2 deletions(-) > >> > >> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > >> index a4042ae24770..3ad5c850f3bf 100644 > >> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > >> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml > >> @@ -93,6 +93,7 @@ properties: > >> - qcom,sm8350-smmu-500 > >> - qcom,sm8450-smmu-500 > >> - qcom,sm8550-smmu-500 > >> + - qcom,sm8650-smmu-500 > >> - const: qcom,adreno-smmu > >> - const: qcom,smmu-500 > >> - const: arm,mmu-500 > >> @@ -508,7 +509,10 @@ allOf: > >> - if: > >> properties: > >> compatible: > >> - const: qcom,sm8550-smmu-500 > >> + contains: > >> + enum: > >> + - qcom,sm8550-smmu-500 > >> + - qcom,sm8650-smmu-500 > > > > Doesn't this cause warnings for non-GPU SMMU on this platform? > > No because it doesn't add those to required, it simply allows clock the properties. Can we further constrain this branch so that it is applicable only to the Adreno SMMUs (and enforce requirement)? And maybe constrain the second if-branch so that it doesn't apply to the Adreno SMMUs? > > > > >> then: > >> properties: > >> clock-names: > >> @@ -544,7 +548,6 @@ allOf: > >> - qcom,sdx65-smmu-500 > >> - qcom,sm6350-smmu-500 > >> - qcom,sm6375-smmu-500 > >> - - qcom,sm8650-smmu-500 > >> - qcom,x1e80100-smmu-500 > >> then: > >> properties: > >> > >> -- > >> 2.34.1 > >> > > > > > -- With best wishes Dmitry