Received: by 2002:a05:7412:1e0b:b0:fc:a2b0:25d7 with SMTP id kr11csp398116rdb; Thu, 15 Feb 2024 03:49:44 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCVA0ImdHNbUcQksT2iVDv/NtK0qdrcEArom4s9sYjuDriU1dH8PMhiX6CbVuTcUu49ZtQ37vbxIaFMVhyC8NFV3FYya0efBWK88FeeMsg== X-Google-Smtp-Source: AGHT+IGHOIQrrqo/bxjUz+GtxCZ436yZ/fbklHhchJ5diIcPka2G4aIRo4XZQCxNAIPlIKBTMdv9 X-Received: by 2002:a05:6a20:c842:b0:19e:a21e:e01e with SMTP id ha2-20020a056a20c84200b0019ea21ee01emr1280399pzb.23.1707997784266; Thu, 15 Feb 2024 03:49:44 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1707997784; cv=pass; d=google.com; s=arc-20160816; b=xLLDh627K9QQZjnvoUGHPidTKg3OIdwmeJUEhvr4Wk0aEpH5N+U3XTxb1f/U2pvMkR 6sRkL4y7xs7XULwj58csCpf62VQ0a8pabc1cAUa87byas6GpvUYEfKZA+RBWLFjTKmri GguyZzZ0cYMflh+WfUCGaC3U7hE6nyPnIiDUy8rCRJTwtKILSwGNLMyfHkGWgFt5dLGH OqxvAxtfzMuKFct/7P7Jgdmr32D+xlM8Xxi1woIxAGuMRb8h7S7tGOoMLm05udIWcojm XqkBw5SP2a0eUPls5F8oSWfLu+1uZYsW0FElXsaEW3VC+R+JrALS6UY9IjekqZ/eb569 TPtQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=in-reply-to:content-disposition:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:message-id:subject:cc :to:from:date; bh=Majx0PUysvoR4HCUbu9/PEjcNqYL8r38JJuhFSY/jzA=; fh=rCOJwpu1TssAJoDvIA/do6T2op+ifjlRbaxce0T5gsU=; b=hIf89x+xnyFlAU7nWKl/PYfboejzokQ0tv3h/gUjGmpigcAOoa9W7l9ZDXYp/654cd QwmHj409EJfjTWPD5rtOBRS+KB8ICjlCJ9mij8qNP9dOFRhUgkOkni2i4VlUF7Qtfr4d DCaKCUn2w2KYFEShpNJZjvjF4SGwY5PnkTYnLY9uA2E93DZfhXOQkI8i78Wx8zAVz+v5 CNThaTfG+qDuVI24Rnf0XdO+b4RaS0x5KJPgctB39FL6FgnCkSd5fYyTLTZfafr7OY9W CM3/YlaHTn5GByGnhnZriCURTkERoncwWJPZMOCLAfwylItvUGjRYO/eqV4uqegOVtbk r4BQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; arc=pass (i=1 spf=pass spfdomain=arm.com dmarc=pass fromdomain=arm.com); spf=pass (google.com: domain of linux-kernel+bounces-66788-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-66788-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. [147.75.48.161]) by mx.google.com with ESMTPS id ka5-20020a056a00938500b006e04dddc978si1048362pfb.305.2024.02.15.03.49.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Feb 2024 03:49:44 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-66788-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) client-ip=147.75.48.161; Authentication-Results: mx.google.com; arc=pass (i=1 spf=pass spfdomain=arm.com dmarc=pass fromdomain=arm.com); spf=pass (google.com: domain of linux-kernel+bounces-66788-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-66788-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id C2102B2B3CB for ; Thu, 15 Feb 2024 11:28:06 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9496812AAC8; Thu, 15 Feb 2024 11:27:28 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B6CC260DC5; Thu, 15 Feb 2024 11:27:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707996448; cv=none; b=AIEv1eSSoh7UCdEloPTIdIGAeFQAMY1Ex1L6XwOSShZFt1/jQw/0Ihdqb+F1nSHfCoc6kVinJNRa7z3JoXYrmANtg83aAxLZEcToNrAMO+8pNCCFaZNgsjoRwyaPrsPbjEDKAQsnN2vJ1k23ciwswlZVLNflcrhJJtIiCYKIXYo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707996448; c=relaxed/simple; bh=pneRKOG04Q5HEf5H9t1s/vwSw+7DjCJ4W7QwhEnz3pM=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=B55X9Y5L+MRGeLPKsS/OKwWMmY2C8XMSC76H/oTMEY2t0wzgukisb/BJ14WTOo28CysTFYg620gDUMMfuJ2cDTNlkuOaL5jC5cBGrVyEuYU2sbdsdG8P6lpZs+KeiZJH3x6beecOattJHPPtnYVlfjh49cM4awjba+7JbK4uP9Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 121CF1516; Thu, 15 Feb 2024 03:28:07 -0800 (PST) Received: from bogus (unknown [10.163.74.245]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9CDD43F7B4; Thu, 15 Feb 2024 03:27:20 -0800 (PST) Date: Thu, 15 Feb 2024 11:27:19 +0000 From: Sudeep Holla To: Sunil V L , linux-riscv@lists.infradead.org, Pierre Gondois Cc: linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, Anup Patel , Albert Ou , "Rafael J . Wysocki" , Viresh Kumar , Atish Kumar Patra , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Andrew Jones , Len Brown Subject: Re: [PATCH v1 -next 0/3] RISC-V: ACPI: Enable CPPC based cpufreq support Message-ID: <20240215112719.ciq7nrh6tr2ksr5j@bogus> References: <20240208034414.22579-1-sunilvl@ventanamicro.com> <72ef475f-513b-4e33-ae85-f7e693a0cd38@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <72ef475f-513b-4e33-ae85-f7e693a0cd38@arm.com> On Fri, Feb 09, 2024 at 12:11:11PM +0100, Pierre Gondois wrote: > The code looks good to me, so FWIW: > Reviewed-by: Pierre Gondois > > +Sudeep as this touches cppc/arm in case he didn't see the patches > Thanks! > On 2/8/24 04:44, Sunil V L wrote: > > This series enables the support for "Collaborative Processor Performance > > Control (CPPC) on ACPI based RISC-V platforms. It depends on the > > encoding of CPPC registers as defined in RISC-V FFH spec [2]. > > > > CPPC is described in the ACPI spec [1]. RISC-V FFH spec required to > > enable this, is available at [2]. > > > > [1] - https://uefi.org/specs/ACPI/6.5/08_Processor_Configuration_and_Control.html#collaborative-processor-performance-control > > [2] - https://github.com/riscv-non-isa/riscv-acpi-ffh/releases/download/v1.0.0/riscv-ffh.pdf > > > > The series is based on the LPI support series. > > Based-on: 20240118062930.245937-1-sunilvl@ventanamicro.com > > (https://lore.kernel.org/lkml/20240118062930.245937-1-sunilvl@ventanamicro.com/) > > > > Sunil V L (3): > > ACPI: RISC-V: Add CPPC driver > > cpufreq: Move CPPC configs to common Kconfig and add RISC-V > > RISC-V: defconfig: Enable CONFIG_ACPI_CPPC_CPUFREQ > > Looks good to me. Acked-by: Sudeep Holla -- Regards, Sudeep