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Date: Thu, 15 Feb 2024 21:31:52 +0200
From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Serge Semin <fancer.lancer@gmail.com>
Cc: Mark Brown <broonie@kernel.org>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/3] spi: dw: Add a number of native CS auto-detection
Message-ID: <Zc5mqLS34XIEo36F@smile.fi.intel.com>
References: <20240215180102.13887-1-fancer.lancer@gmail.com>
 <20240215180102.13887-3-fancer.lancer@gmail.com>
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Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo

On Thu, Feb 15, 2024 at 09:00:47PM +0300, Serge Semin wrote:
> Aside with the FIFO depth and DFS field size it's possible to auto-detect
> a number of native chip-select synthesized in the DW APB/AHB SSI IP-core.
> It can be done just by writing ones to the SER register. The number of
> writable flags in the register is limited by the SSI_NUM_SLAVES IP-core
> synthesize parameter. All the upper flags are read-only and wired to zero.
> Based on that let's add the number of native CS auto-detection procedure
> so the low-level platform drivers wouldn't need to manually set it up
> unless it's required to set a constraint due to platform-specific reasons
> (for instance, due to a hardware bug).

..

> +	/*
> +	 * Try to detect the number of native chip-selects if the platform
> +	 * driver didn't set it up. There can be up to 16 lines configured.
> +	 */
> +	if (!dws->num_cs) {
> +		u32 ser;
> +
> +		dw_writel(dws, DW_SPI_SER, 0xffff);

GENMASK() ?

> +		ser = dw_readl(dws, DW_SPI_SER);
> +		dw_writel(dws, DW_SPI_SER, 0);

Would it actually change the physical line state? If so, we may not do this.

> +		dws->num_cs = hweight16(ser);

Why 16 and not u16 & dw_writew()/readw()?

> +	}

I'm wondering why this can't be the default

	num_cs = ...autodetected...
	device_property_read(..., &num_cs);

-- 
With Best Regards,
Andy Shevchenko