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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="2uNUAPuRLcz3Tc2D" Content-Disposition: inline In-Reply-To: <20240215-xdma-v1-1-1139960cf096@microchip.com> --2uNUAPuRLcz3Tc2D Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Feb 15, 2024 at 04:25:15PM +0530, Durai Manickam KR wrote: > Added a description, required properties and appropriate compatibles > for all the SoCs that are supported by microchip for the XDMAC. >=20 > Signed-off-by: Durai Manickam KR > --- > .../devicetree/bindings/dma/atmel-xdma.txt | 54 --------------- > .../bindings/dma/microchip,at91-xdma.yaml | 77 ++++++++++++++++= ++++++ > 2 files changed, 77 insertions(+), 54 deletions(-) >=20 > diff --git a/Documentation/devicetree/bindings/dma/atmel-xdma.txt b/Docum= entation/devicetree/bindings/dma/atmel-xdma.txt > deleted file mode 100644 > index 76d649b3a25d..000000000000 > --- a/Documentation/devicetree/bindings/dma/atmel-xdma.txt > +++ /dev/null > @@ -1,54 +0,0 @@ > -* Atmel Extensible Direct Memory Access Controller (XDMAC) > - > -* XDMA Controller > -- interrupts: Should contain DMA interrupt. > -- #dma-cells: Must be <1>, used to represent the number of integer cells= in > -the dmas property of client devices. > - - The 1st cell specifies the channel configuration register: > - - bit 13: SIF, source interface identifier, used to get the memory > - interface identifier, > - - bit 14: DIF, destination interface identifier, used to get the per= ipheral > - interface identifier, > - - bit 30-24: PERID, peripheral identifier. > - > -Example: > - > -dma1: dma-controller@f0004000 { > - compatible =3D "atmel,sama5d4-dma"; > - reg =3D <0xf0004000 0x200>; > - interrupts =3D <50 4 0>; > - #dma-cells =3D <1>; > -}; > - > - > -* DMA clients > -DMA clients connected to the Atmel XDMA controller must use the format > -described in the dma.txt file, using a one-cell specifier for each chann= el. > -The two cells in order are: > -1. A phandle pointing to the DMA controller. > -2. Channel configuration register. Configurable fields are: > - - bit 13: SIF, source interface identifier, used to get the memory > - interface identifier, > - - bit 14: DIF, destination interface identifier, used to get the per= ipheral > - interface identifier, > - - bit 30-24: PERID, peripheral identifier. > - > -Example: > - > -i2c2: i2c@f8024000 { > - compatible =3D "atmel,at91sam9x5-i2c"; > - reg =3D <0xf8024000 0x4000>; > - interrupts =3D <34 4 6>; > - dmas =3D <&dma1 > - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) > - | AT91_XDMAC_DT_PERID(6))>, > - <&dma1 > - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) > - | AT91_XDMAC_DT_PERID(7))>; > - dma-names =3D "tx", "rx"; > -}; > diff --git a/Documentation/devicetree/bindings/dma/microchip,at91-xdma.ya= ml b/Documentation/devicetree/bindings/dma/microchip,at91-xdma.yaml > new file mode 100644 > index 000000000000..0bd79c7b5e6f > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/microchip,at91-xdma.yaml > @@ -0,0 +1,77 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/microchip,at91-xdma.yaml# Filename matching a compatible please. > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Atmel Extensible Direct Memory Access Controller (XDMAC) > + > +maintainers: > + - Durai Manickam KR > + > +description: | The | is not needed, you've no formatting to preserve. > + The Atmel Extensible Direct Memory Access Controller (XDMAC) performs = peripheral > + data transfer and memory move operations over one or two bus ports thr= ough the > + unidirectional communication channel. Each channel is fully programmab= le and > + provides both peripheral or memory-to-memory transfers. > + > +properties: > + compatible: > + oneOf: > + - enum: > + - atmel,sama5d4-dma > + - microchip,sama7g5-dma > + - microchip,sam9x7-dma The text binding says: > -- compatible: Should be "atmel,sama5d4-dma", "microchip,sam9x60-dma" or > - "microchip,sama7g5-dma" or > - "microchip,sam9x7-dma", "atmel,sama5d4-dma". That's not what you have here at all. > + - items: > + - const: atmel,sama5d4-dma > + - const: microchip,sam9x60-dma This looks backwards. > + reg: > + description: Should contain DMA registers location and length. > + maxItems: 1 Same comments here about descriptions for well known properties as the other DMA controller. > + > + interrupts: > + description: Should contain the DMA interrupts associated to the DMA= channels. > + maxItems: 1 > + > + "#dma-cells": > + description: | > + Must be <1>, used to represent the number of integer cells in the = dmas > + property of client device. > + -The 1st cell specifies the channel configuration register: > + -bit 13: SIF, source interface identifier, used to get the memory > + interface identifier, > + -bit 14: DIF, destination interface identifier, used to get the pe= ripheral > + interface identifier, > + -bit 30-24: PERID, peripheral identifier. > + const: 1 > + > + clocks: > + description: Should contain a clock specifier for each entry in cloc= k-names. > + maxItems: 1 And here about adding properties. Please explain in your commit message where the new properties came from. > + > + clock-names: > + description: Should contain the clock of the DMA controller. > + const: dma_clk > + > +required: > + - compatible > + - reg > + - interrupts > + - "#dma-cells" > + - clocks > + - clock-names > + > +additionalProperties: false > + > +examples: > + - | > + dma0: dma-controller@f0004000 { And same here about the label :) Cheers, Conor. > + compatible =3D "atmel,sama5d4-dma"; > + reg =3D <0xffffec00 0x200>; > + interrupts =3D <50 4 0>; > + #dma-cells =3D <1>; > + clocks =3D <&pmc 2 20>; > + clock-names =3D "dma_clk"; > + }; > + > +... >=20 > --- > base-commit: 8d3dea210042f54b952b481838c1e7dfc4ec751d > change-id: 20240215-xdma-36e8bdbf8141 >=20 > Best regards, > --=20 > Durai Manickam KR >=20 --2uNUAPuRLcz3Tc2D Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZc5nTwAKCRB4tDGHoIJi 0mWeAQDyxMRExEs8PvvE6a8W3mU1c68idO13L6qbJOJZzZggbwD+PeCtNY1Irgpl 9q5poFzXZZ7w/mux7+IUq6SBm6lUzA4= =pFvp -----END PGP SIGNATURE----- --2uNUAPuRLcz3Tc2D--