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Fri, 16 Feb 2024 10:18:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ew.tq-group.com; s=dkim; t=1708075105; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=9h5wDTixacUMLfnEkk4dJ+i0Fer99CHkegjhnU+Eq9E=; b=P6hDkCEnkOhtlRBcTxw+1CpOYBfdi9rhKbZVfMoqhCpzXL/Gpu8d7SYTyqoffIPLEXWKrr qWSv1SFDzvr0pXcHZ04ZGLL23ek3tkgapqmbun3nuMUOxnLPT70LieSM8FCI6zh6WyQv8G qX4VmGEW4AnharcxXls67DMYWfg/nbOkUKxDLxnEZtyu4W7kpjsYMhVGK6RrtcxDBJvZLQ XJeJ8EBWSOPizyLhwMYXST9fRe17ojqtag/mOZtYA9L6lsndjfiQZCm0Izc8j/oKaTtNvX lj+RWe6t57VDJV3nKb84G7pE74hX1LMftV9q5KRUGQZHFmlxWy7O5uGLsmI1xw== Date: Fri, 16 Feb 2024 10:18:10 +0100 From: Gregor Herburger To: Dimitri Fedrau Cc: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Message-ID: References: <20240213213955.178762-1-dima.fedrau@gmail.com> <20240213213955.178762-6-dima.fedrau@gmail.com> <20240215202403.GA3103@debian> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240215202403.GA3103@debian> X-Last-TLS-Session-Version: TLSv1.3 On Thu, Feb 15, 2024 at 09:24:03PM +0100, Dimitri Fedrau wrote: > > Hi Dimitri, > > > Hi Gregor, > > > On Tue, Feb 13, 2024 at 10:39:44PM +0100, Dimitri Fedrau wrote: > > > static struct phy_driver mv88q2xxx_driver[] = { > > > { > > > .phy_id = MARVELL_PHY_ID_88Q2110, > > > @@ -255,12 +439,26 @@ static struct phy_driver mv88q2xxx_driver[] = { > > > .get_sqi = mv88q2xxx_get_sqi, > > > .get_sqi_max = mv88q2xxx_get_sqi_max, > > > }, > > > + { > > > + PHY_ID_MATCH_EXACT(PHY_ID_88Q2220_REVB0), > > > > I tested the series on a 88Q2220 REV B1 (which is id 0x002b0b22). The > > driver works fine on this revision. > > > > I understand that in the Marvell API the initialization for Rev B0 and > > B1 differ. For B0 some additional init sequence is executed. I did not look > > into the details of this sequence. However this patch seems to work on > > Rev B1. > > > > Would you consider adding compatibility for Rev B1 and following? I > > tested with: > > .phy_id = MARVELL_PHY_ID_88Q2220, > > .phy_id_mask = MARVELL_PHY_ID_MASK, > > > > thanks for testing. I would stick to the exact initialization sequence > provided by the Marvell API. Registers and bits are mostly undocumented > and I think it is safest this way. Besides that it should be relatively > easy to add the support for rev. B1 by just adding the init sequence for > it. Ok. I will have an closer look at the marvell API and eventually come up with a patch for Rev. B1. There is also a Rev.B2 for which I cannot find any init sequence. But Rev. B1 will no longer be produced so I need a solution for B2 eventually. Best regards Gregor -- TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht München, HRB 105018 Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider https://www.tq-group.com/