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Fri, 16 Feb 2024 10:48:17 +0100 (CET) Received: from localhost (10.201.20.114) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Fri, 16 Feb 2024 10:48:16 +0100 From: Antonio Borneo To: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Catalin Marinas , Will Deacon CC: Antonio Borneo , , , , Subject: [PATCH 00/12] irqchip/stm32-exti: add irq-map and STM32MP25 support Date: Fri, 16 Feb 2024 10:47:45 +0100 Message-ID: <20240216094758.916722-1-antonio.borneo@foss.st.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SAFCAS1NODE2.st.com (10.75.90.13) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-16_08,2024-02-14_01,2023-05-22_02 This series adds support for STM32MP25 to stm32-exti driver. The STM32MP25 includes two instances of the EXTI irq controller, each mapping their EXTI events to different GIC irq sets. In the current driver code, the mapping between events and irqs would require adding to the driver two new compatibles and two new mapping tables for this new SoC. This way of working starts showing it's limits; it doesn't scale and is not flexible. This series introduces an optional nexus child node to the EXTI DT node. The nexus node provides the mapping between events and irqs through the standard "interrupt-map" property, thus moving in the DT the description of the HW connections between the EXTI and the GIC. Being the nexus child node optional, it guarantees the backward compatibility with all the existing DT for STM32MP1xx. Nevertheless the series updates and uniforms the existing DT by adding to them the nexus child node too. The DT node for the GIC of STM32MP25 is already upstream with: #address-cells = <1>; This value needs to be updated to <2> because the SoC uses 64 bit addressing and the v2m child node of GIC requires 64 bit address too. This minor change to the GIC property "#address-cells" impacts the contents of the "interrupt-map" property. This series also anticipates the addition of the v2m child node to the GIC, thus avoiding any further rework. Antonio Borneo (11): irqchip/stm32-exti: Fix minor indentation issue dt-bindings: interrupt-controller: stm32-exti: Add irq nexus child node irqchip/stm32-exti: Map interrupts through interrupt nexus node irqchip/stm32-exti: Convert driver to standard PM irqchip/stm32-exti: Skip secure events irqchip/stm32-exti: Mark events reserved with RIF configuration check arm64: Kconfig.platforms: Enable STM32_EXTI for ARCH_STM32 ARM: dts: stm32: Use exti interrupt-map on stm32mp151 ARM: dts: stm32: Use exti interrupt-map on stm32mp131 arm64: dts: st: Add exti1 and exti2 nodes on stm32mp251 arm64: dts: st: Add interrupt parent to pinctrl on stm32mp251 Christian Bruel (1): arm64: dts: st: Add v2m to GIC node on stm32mp251 .../interrupt-controller/st,stm32-exti.yaml | 42 ++++- arch/arm/boot/dts/st/stm32mp131.dtsi | 49 +++++- arch/arm/boot/dts/st/stm32mp151.dtsi | 51 ++++++ arch/arm64/Kconfig.platforms | 1 + arch/arm64/boot/dts/st/stm32mp251.dtsi | 154 +++++++++++++++++- drivers/irqchip/irq-stm32-exti.c | 148 ++++++++++++----- 6 files changed, 397 insertions(+), 48 deletions(-) base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d -- 2.34.1