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Date: Fri, 16 Feb 2024 11:36:41 +0100
Message-Id: <CZ6FR855VPP7.3GHX4EO9WEZIH@fairphone.com>
To: "Dmitry Baryshkov" <dmitry.baryshkov@linaro.org>
Cc: "Konrad Dybcio" <konrad.dybcio@linaro.org>, "Andy Gross"
 <agross@kernel.org>, "Bjorn Andersson" <andersson@kernel.org>, "Rob
 Herring" <robh+dt@kernel.org>, "Krzysztof Kozlowski"
 <krzysztof.kozlowski+dt@linaro.org>, "Conor Dooley" <conor+dt@kernel.org>,
 "Bhupesh Sharma" <bhupesh.linux@gmail.com>, "David Heidelberg"
 <david@ixit.cz>, "Stephan Gerhold" <stephan@gerhold.net>,
 <~postmarketos/upstreaming@lists.sr.ht>, <phone-devel@vger.kernel.org>,
 "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>,
 <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
 <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH RFT] arm64: dts: qcom: sm8350: Reenable crypto &
 cryptobam
From: "Luca Weiss" <luca.weiss@fairphone.com>
References: <20240108-sm8350-qce-v1-1-b7d586ff38af@fairphone.com>
 <a5923bf7-0a05-43bd-b282-b45e5653ac4d@linaro.org>
 <CY9E4ZCHOMWU.C18NR0H7V1QX@fairphone.com>
 <CAA8EJppCAMXds5F4bgeb9VJSwph-+4ekVsJ=rGib5=RR5m0DPg@mail.gmail.com>
In-Reply-To: <CAA8EJppCAMXds5F4bgeb9VJSwph-+4ekVsJ=rGib5=RR5m0DPg@mail.gmail.com>

On Mon Jan 8, 2024 at 11:45 PM CET, Dmitry Baryshkov wrote:
> On Mon, 8 Jan 2024 at 16:23, Luca Weiss <luca.weiss@fairphone.com> wrote:
> >
> > On Mon Jan 8, 2024 at 3:18 PM CET, Konrad Dybcio wrote:
> > > On 8.01.2024 14:49, Luca Weiss wrote:
> > > > When num-channels and qcom,num-ees is not provided in devicetree, t=
he
> > > > driver will try to read these values from the registers during prob=
e but
> > > > this fails if the interconnect is not on and then crashes the syste=
m.
> > > >
> > > > So we can provide these properties in devicetree (queried after pat=
ching
> > > > BAM driver to enable the necessary interconnect) so we can probe
> > > > cryptobam without reading registers and then also use the QCE as
> > > > expected.
> > >
> > > This really feels a bit backwards.. Enable the resource to query the
> > > hardware for numbers, so that said resource can be enabled, but
> > > slightly later :/
> >
> > If you think adding interconnect support to driver and dtsi is better,
> > let me know.
>
> I'd say, adding the proper interconnect is a better option. Otherwise
> we just depend on the QCE itself to set up the vote for us.

Yes, currently we depend on that.

>
> >
> > Stephan (+CC) mentioned it should be okay like this *shrug*
> >
> > For the record, this is the same way I got the values for sc7280[0] and
> > sm6350[1].
> >
> > [0] https://lore.kernel.org/linux-arm-msm/20231229-sc7280-cryptobam-fix=
up-v1-1-bd8f68589b80@fairphone.com/
> > [1] https://lore.kernel.org/linux-arm-msm/20240105-sm6350-qce-v1-0-416e=
5c7319ac@fairphone.com/
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts=
/qcom/sm8350.dtsi
> > index b46236235b7f..cd4dd9852d9e 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> > @@ -1756,8 +1756,8 @@ cryptobam: dma-controller@1dc4000 {
> >                         qcom,controlled-remotely;
> >                         iommus =3D <&apps_smmu 0x594 0x0011>,
> >                                  <&apps_smmu 0x596 0x0011>;
> > -                       /* FIXME: Probing BAM DMA causes some abort and=
 system hang */
> > -                       status =3D "fail";
> > +                       interconnects =3D <&aggre2_noc MASTER_CRYPTO 0 =
&mc_virt SLAVE_EBI1 0>;
> > +                       interconnect-names =3D "memory";
> >                 };
> >
> >                 crypto: crypto@1dfa000 {
> > diff --git a/drivers/dma/qcom/bam_dma.c b/drivers/dma/qcom/bam_dma.c
> > index 5e7d332731e0..9de28f615639 100644
> > --- a/drivers/dma/qcom/bam_dma.c
> > +++ b/drivers/dma/qcom/bam_dma.c
> > @@ -40,6 +40,7 @@
> >  #include <linux/circ_buf.h>
> >  #include <linux/clk.h>
> >  #include <linux/dmaengine.h>
> > +#include <linux/interconnect.h>
> >  #include <linux/pm_runtime.h>
> >
> >  #include "../dmaengine.h"
> > @@ -394,6 +395,7 @@ struct bam_device {
> >         const struct reg_offset_data *layout;
> >
> >         struct clk *bamclk;
> > +       struct icc_path *mem_path;
> >         int irq;
> >
> >         /* dma start transaction tasklet */
> > @@ -1206,6 +1208,7 @@ static int bam_init(struct bam_device *bdev)
> >                 bdev->num_channels =3D val & BAM_NUM_PIPES_MASK;
> >         }
> >
> > +       printk(KERN_ERR "%s:%d DBG num_ees=3D%u num_channels=3D%u\n", _=
_func__, __LINE__, bdev->num_ees, bdev->num_channels);
> >         /* Reset BAM now if fully controlled locally */
> >         if (!bdev->controlled_remotely && !bdev->powered_remotely)
> >                 bam_reset(bdev);
> > @@ -1298,6 +1301,14 @@ static int bam_dma_probe(struct platform_device =
*pdev)
> >                 return ret;
> >         }
> >
> > +       bdev->mem_path =3D devm_of_icc_get(bdev->dev, "memory");
> > +       if (IS_ERR(bdev->mem_path))
> > +               return PTR_ERR(bdev->mem_path);
> > +
> > +       ret =3D icc_set_bw(bdev->mem_path, 1, 1);
>
> Probably this needs some more sensible value.

So downstream qcedev driver uses 384 for the interconnect. But this is
crypto-specific and probably different BAMs have different minimum
requirements?

#define CRYPTO_AVG_BW			384
#define CRYPTO_PEAK_BW			384
https://github.com/xiaomi-sm8450-kernel/android_kernel_platform_msm-kernel/=
blob/lineage-20/drivers/crypto/msm/qce.h#L57

Do you have any suggestion what to use here?

Also I'd assume that with pm_runtime suspended we'd need to clear the
votes in the driver so we don't keep the interconnect alive
unnecessarily?

If someone wants to pick up that patch, I'd be very glad since
especially for sm8350 this is just a drive-by, I don't care too much
about the SoC myself ;)

Regards
Luca

>
> > +       if (ret)
> > +               return ret;
> > +
> >         ret =3D bam_init(bdev);
> >         if (ret)
> >                 goto err_disable_clk;
> >