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AJvYcCWHZy8Toar8xXY99hDrUEv/O/RJ2c590jrZEN948DCpRcK3r7XduohYHVZGFyKGvQkr5BlDf3+91yFscEVARJJgqbBxDqMXpAIT1RCp X-Gm-Message-State: AOJu0YyDit6mVX4fCSgw4zOtn1so1Zwy0sHxJ/vu5nt7im2vcSfQUTgA yCr9lxgsfD40ZEgJste9q7BAe24ajR77PHqoBa6AE4u4lqIgvjD0MSHa0//jBkKn7IRDPF906D4 +92ZxC9pdgo750Z160FSoEmnKN/x32Ketp2280Q== X-Received: by 2002:a0d:ccd8:0:b0:607:81e6:e320 with SMTP id o207-20020a0dccd8000000b0060781e6e320mr4287942ywd.16.1708080787250; Fri, 16 Feb 2024 02:53:07 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20231231171237.3322376-1-quic_jprakash@quicinc.com> <20231231171237.3322376-4-quic_jprakash@quicinc.com> In-Reply-To: From: Dmitry Baryshkov Date: Fri, 16 Feb 2024 12:52:56 +0200 Message-ID: Subject: Re: [PATCH v3 3/3] iio: adc: Add support for QCOM PMIC5 Gen3 ADC To: Jishnu Prakash Cc: jic23@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, lee@kernel.org, andriy.shevchenko@linux.intel.com, daniel.lezcano@linaro.org, lars@metafoo.de, luca@z3ntu.xyz, marijn.suijten@somainline.org, agross@kernel.org, sboyd@kernel.org, rafael@kernel.org, rui.zhang@intel.com, lukasz.luba@arm.com, linus.walleij@linaro.org, quic_subbaram@quicinc.com, quic_collinsd@quicinc.com, quic_amelende@quicinc.com, quic_kamalw@quicinc.com, kernel@quicinc.com, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-msm-owner@vger.kernel.org, linux-iio@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, cros-qcom-dts-watchers@chromium.org Content-Type: text/plain; charset="UTF-8" On Wed, 14 Feb 2024 at 15:58, Jishnu Prakash wrote: > > Hi Dmitry, > > On 12/31/2023 11:16 PM, Dmitry Baryshkov wrote: > > On Sun, 31 Dec 2023 at 19:13, Jishnu Prakash wrote: > >> The ADC architecture on PMIC5 Gen3 is similar to that on PMIC5 Gen2, > >> with all SW communication to ADC going through PMK8550 which > >> communicates with other PMICs through PBS. > > >> +static int adc_tm_register_tzd(struct adc5_chip *adc) > >> +{ > >> + unsigned int i, channel; > >> + struct thermal_zone_device *tzd; > >> + > >> + for (i = 0; i < adc->nchannels; i++) { > >> + channel = V_CHAN(adc->chan_props[i]); > >> + > >> + if (!adc->chan_props[i].adc_tm) > >> + continue; > >> + tzd = devm_thermal_of_zone_register(adc->dev, channel, > >> + &adc->chan_props[i], &adc_tm_ops); > > It is _very_ useful to register a hwmon too by calling > > devm_thermal_add_hwmon_sysfs(). However this becomes tricky, as this > > function is not defined in one of the global headers. > > > > This actually points out an issue. You have the ADC driver fused > > together with the thermal driver. Can I suggest using the aux device > > to split the thermal functionality to the separate driver? > > > > This way it would be possible to use the ADC without any thermal > > monitoring in place. > > > There are a couple of issues which may make it harder to split the > thermal functionality from this driver into an auxiliary driver as you > mentioned. > > For one, we use the same set of registers (offsets 0x4f-0x55) for both > VADC function(requesting an immediate channel reading) and ADC_TM > function (setting upper/lower thermal thresholds on a channel). To avoid > any race conditions, we would need to share a mutex between the > top-level ADC driver and the auxiliary ADC_TM thermal driver to avoid > concurrently accessing these or any other shared registers. Just export an API performing this access. No need to export data (aka mutex). > > In addition, the device has only one interrupt with one interrupt > handler, and it gets triggered for both VADC and ADC_TM events (end of > conversion and threshold violation, respectively). The handler checks > for both types of event and handles it as required. You can extend auxiliary drivers with the custom callbacks, see drivers/base/auxiliary.c . I think you can call a callback from ADC_TM driver from your ADC driver. > > For the shared interrupt, we may be able to keep the interrupt handler > in the top-level driver and just notify the auxiliary TM driver if a > threshold violation is detected. For the shared mutex, I think the > auxiliary driver may be able to access the parent driver's mutex, but > I'll need to check more for the implementation in both of these cases. > > Please let me know if you see any problems with this kind of > implementation or if you have any additional comments. > > Thanks, > > Jishnu > > >> + > >> + if (IS_ERR(tzd)) { > >> + if (PTR_ERR(tzd) == -ENODEV) { > >> + dev_warn(adc->dev, "thermal sensor on channel %d is not used\n", > >> + channel); > >> + continue; > >> + } > >> + > >> > > -- With best wishes Dmitry