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[209.85.219.174]) by smtp.gmail.com with ESMTPSA id c2-20020a0df302000000b006046bd562a5sm348965ywf.128.2024.02.16.06.05.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 16 Feb 2024 06:05:04 -0800 (PST) Received: by mail-yb1-f174.google.com with SMTP id 3f1490d57ef6-dc6d9a8815fso2174811276.3; Fri, 16 Feb 2024 06:05:04 -0800 (PST) X-Forwarded-Encrypted: i=1; AJvYcCXJ3hNqBqctAjgCA8ureXlIFqpb2gcuGE+5ntQB1ylGWYYX3cSCLLXERFPw3RmqsAo4N3Ro6NnZS9BQrFC1XejilUEfGVJNeraq04So3XjnogxCn6fU+ZGM5OiD65Kj0bm5TG5E/c6EBs/SybjKXMcFAnD0erXSnpw20kNOZEq5tWJwUYIs/xMq5sziKJVT++PlJL5B7rqWQWRIYm8nojJmp1SnaQ6G X-Received: by 2002:a25:b78d:0:b0:dc6:c510:df6b with SMTP id n13-20020a25b78d000000b00dc6c510df6bmr5663068ybh.55.1708092304106; Fri, 16 Feb 2024 06:05:04 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240208124300.2740313-1-claudiu.beznea.uj@bp.renesas.com> <20240208124300.2740313-7-claudiu.beznea.uj@bp.renesas.com> In-Reply-To: <20240208124300.2740313-7-claudiu.beznea.uj@bp.renesas.com> From: Geert Uytterhoeven Date: Fri, 16 Feb 2024 15:04:52 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 06/17] dt-bindings: clock: renesas,rzg2l-cpg: Update #power-domain-cells = <1> To: Claudiu Cc: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, magnus.damm@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Claudiu Beznea Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Claudiu, On Thu, Feb 8, 2024 at 1:43=E2=80=AFPM Claudiu w= rote: > From: Claudiu Beznea > > The driver will be modified (in the next commits) to be able to specify > individual power domain ID for each IP. Update the documentation to cope > with this. > > Signed-off-by: Claudiu Beznea Thanks for your patch! > --- a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml > +++ b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml > @@ -57,7 +57,7 @@ properties: > can be power-managed through Module Standby should refer to the CP= G device > node in their "power-domains" property, as documented by the gener= ic PM > Domain bindings in Documentation/devicetree/bindings/power/power-d= omain.yaml. > - const: 0 > + const: 1 While the driver will soon support both 0 and 1, we may need to keep 0 for RZ/V2M for now? RZ/V2M does not have CPG_BUS_*_MSTOP registers, but uses the Internal Power Domain Controller (PMC). Please add a link to the power domain numbers in , like is done for #clock-cells. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds