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[209.85.219.173]) by smtp.gmail.com with ESMTPSA id 4-20020a250104000000b00dc7496891f1sm330044ybb.54.2024.02.16.06.17.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 16 Feb 2024 06:17:20 -0800 (PST) Received: by mail-yb1-f173.google.com with SMTP id 3f1490d57ef6-dcd7c526cc0so2237243276.1; Fri, 16 Feb 2024 06:17:20 -0800 (PST) X-Forwarded-Encrypted: i=1; AJvYcCUAZMpm5+ECPyUxMHqTOGgVvRP0Y/+Gj7KVNwTNrSke0AancPmMddxySziL+Km1qNsCVzX/l4loxRRt8mEakFhaBBLvEI/FjpGRwcymEU1rcQrjIROrppsn73VbCdt3dpBfAfNKb/e5QPx3/Sa/9QaobjrSvyIuHJasp3xf/Io69zMXMIPpDP1KtsgJeZ4ZQthQeiYxZaZbF5E0Uqdd5Td+Xq0c7E1F X-Received: by 2002:a25:b904:0:b0:dc7:8c3a:4e42 with SMTP id x4-20020a25b904000000b00dc78c3a4e42mr4580893ybj.30.1708093039976; Fri, 16 Feb 2024 06:17:19 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240208124300.2740313-1-claudiu.beznea.uj@bp.renesas.com> <20240208124300.2740313-13-claudiu.beznea.uj@bp.renesas.com> In-Reply-To: <20240208124300.2740313-13-claudiu.beznea.uj@bp.renesas.com> From: Geert Uytterhoeven Date: Fri, 16 Feb 2024 15:17:08 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 12/17] arm64: dts: renesas: rzg3s-smarc-som: Guard the ethernet IRQ GPIOs with proper flags To: Claudiu Cc: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, magnus.damm@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Claudiu Beznea Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Claudiu, On Thu, Feb 8, 2024 at 1:44=E2=80=AFPM Claudiu w= rote: > From: Claudiu Beznea > > Ethernet IRQ GPIOs are marked as gpio-hog. Thus, these GPIOs are requeste= d > at probe w/o considering if there are other peripherals that needs them. > The Ethernet IRQ GPIOs are shared w/ SDHI2. Selection b/w Ethernet and > SDHI2 is done through a hardware switch. To avoid scenarios where one wan= ts > to boot with SDHI2 support and some SDHI pins are not propertly configure= d > because of gpio-hog guard Ethernet IRQ GPIO with proper build flag. > > Fixes: 932ff0c802c6 ("arm64: dts: renesas: rzg3s-smarc-som: Enable the Et= hernet interfaces") > Signed-off-by: Claudiu Beznea Thanks for your patch! (which was well-hidden between non-fixes ;-) Reviewed-by: Geert Uytterhoeven i.e. will queue in renesas-devel for v6.9. As Ethernet is enabled by default, I think there is no need to fast-track this for v6.8. Gr{oetje,eeting}s, Geert --=20 Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds