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Date: Fri, 16 Feb 2024 18:28:31 +0100
From: Andrew Lunn <andrew@lunn.ch>
To: Bastien Curutchet <bastien.curutchet@bootlin.com>
Cc: "David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Richard Cochran <richardcochran@gmail.com>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>, netdev@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Herve Codina <herve.codina@bootlin.com>
Subject: Re: [PATCH 1/2] dt-bindings: net: Add TI DP83640
Message-ID: <68c3b805-5532-41dd-bcf3-ff3cb86f4acc@lunn.ch>
References: <20240130085935.33722-1-bastien.curutchet@bootlin.com>
 <20240130085935.33722-2-bastien.curutchet@bootlin.com>
 <dc81a307-3541-47e2-9c72-d661e76889bf@lunn.ch>
 <be23b24e-5de1-400d-84fa-cf5b25e72a19@bootlin.com>
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> > > +  ti,phy-control-frames:
> > > +    $ref: /schemas/types.yaml#/definitions/uint32
> > > +    enum: [0, 1]
> > > +    description: |
> > > +      If present, enables or disables the PHY control frames.
> > > +      PHY Control Frames support can also be strapped. If the strap pin is not
> > > +      set correctly or not set at all then this can be used to configure it.
> > > +       - 0     = PHY Control Frames disabled
> > > +       - 1     = PHY Control Frames enabled
> > > +       - unset = Configured by straps
> > What is a control frame?
> I'm not an expert on this but it seems that if the PHY's Serial Management
> interface is not available, it is possible to build PCF (PHY Control Frame)
> packets that will be passed to PHY through the MAC Transmit Data interface.
> The
> PHY is then able to intercept and interpret these packets. Enabling it
> increases
> the MII Transmit packet latency.
> You'll find details in ?5.4.6 of datasheet
> [https://www.ti.com/lit/gpn/dp83640]

Do you actually need this feature?

[Looks at data sheet]

Ah, so it allows you to access PHY registers by sending it commands in
Ethernet frames. That should in theory be faster than MDIO. However,
my experience with Ethernet switches which offer similar capabilities,
it is often not faster, because of interrupt coalescing. 

Anyway, the serial management interface is the MDIO bus. You know this
is available, because that is how the PHY driver it talking to the
PHY! Also, i've not seen any code which implements sending commands to
the PHY using Ethernet frames.

So why not just hard code it in the driver to disable this feature?

	Andrew