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Date: Fri, 16 Feb 2024 16:41:09 -0600
From: Bjorn Helgaas <helgaas@kernel.org>
To: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Cc: Bean Huo <beanhuo@iokpp.de>, bhelgaas@google.com,
	schnelle@linux.ibm.com, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, Bean Huo <beanhuo@micron.com>,
	stable@vger.kernel.org
Subject: Re: [PATCH v2] PCI: Increase maximum PCIe physical function number
 to 7 for non-ARI devices
Message-ID: <20240216224109.GA1359930@bhelgaas>
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In-Reply-To: <4858e202-6097-493a-8405-86d3e8e17c83@linux.intel.com>

On Fri, Feb 16, 2024 at 02:26:47PM -0800, Kuppuswamy Sathyanarayanan wrote:
> 
> On 2/16/24 11:01 AM, Bean Huo wrote:
> > From: Bean Huo <beanhuo@micron.com>
> >
> > The PCIe specification allows up to 8 Physical Functions (PFs) per endpoint
> > when ARI (Alternative Routing-ID Interpretation) is not supported. Previously,
> > our implementation erroneously limited the maximum number of PFs to 7 for
> > endpoints without ARI support.
> I would quote specification reference here, like below:
> 
> As per PCIe specification r6.2, sec titled "Alternative Routing-ID
> Interpretation (ARI)", up to 8 [fn # 0..7] functions are allowed in
> an non ARI capable device.

That's fine, just know that I silently convert citations like that
to "PCIe r6.2, sec 6.13" because I don't like having to grep for the
text ;)

Bjorn