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Mon, 19 Feb 2024 09:36:25 +0000 (UTC) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= via B4 Relay Date: Mon, 19 Feb 2024 12:36:14 +0300 Subject: [PATCH 2/2] arm64: dts: mt7986: add port@5 as CPU port Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20240219-for-mediatek-v1-2-7078f23eab82@arinc9.com> References: <20240219-for-mediatek-v1-0-7078f23eab82@arinc9.com> In-Reply-To: <20240219-for-mediatek-v1-0-7078f23eab82@arinc9.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno Cc: erkin.bozoglu@xeront.com, mithat.guner@xeront.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?q?Ar=C4=B1n=C3=A7_=C3=9CNAL?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708335384; l=2158; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=58182oTWmYdN/H9gOxWBaCjBXGKyd/UkxWiwHahp3Xo=; b=8ixGoZdtLfMIYfLLr7jnFfKQiIaoNd41jekDYSA4+3eH7gG17EnPXLUZKqLWTyNpHq5tzSDDq OLuyHKPxO4SCQd7MBszzXTj/H/1sT7bqFSPjNa2ZliffoymFdSh5C6Z X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: From: Arınç ÜNAL On MediaTek MT7986b RFB and MediaTek MT7986a RFB, port 5 of the MT7531 switch is connected to the second MAC of the SoC as a CPU port. Add the port and set up the second MAC on the bindings. Signed-off-by: Arınç ÜNAL --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 24 ++++++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 24 ++++++++++++++++++++++++ 2 files changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index 2f884c24f1eb..5d8e3d3f6c20 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -65,6 +65,18 @@ fixed-link { }; }; + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + mdio: mdio-bus { #address-cells = <1>; #size-cells = <0>; @@ -288,6 +300,18 @@ port@4 { label = "lan4"; }; + port@5 { + reg = <5>; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + port@6 { reg = <6>; label = "cpu"; diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts index 57dcaeef31d7..58f77d932429 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts @@ -45,6 +45,18 @@ fixed-link { }; }; + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + mdio: mdio-bus { #address-cells = <1>; #size-cells = <0>; @@ -83,6 +95,18 @@ port@4 { label = "lan4"; }; + port@5 { + reg = <5>; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + port@6 { reg = <6>; label = "cpu"; -- 2.40.1