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From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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	Kuogee Hsieh <quic_khsieh@quicinc.com>
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Subject: Re: [PATCH v6] drm/msm/dpu: improve DSC allocation
Date: Mon, 19 Feb 2024 14:30:42 +0200
Message-Id: <170834569499.2610898.923684601788968526.b4-ty@linaro.org>
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On Thu, 14 Dec 2023 10:56:12 -0800, Kuogee Hsieh wrote:
> At DSC V1.1 DCE (Display Compression Engine) contains a DSC encoder.
> However, at DSC V1.2 DCE consists of two DSC encoders, one has an odd
> index and another one has an even index. Each encoder can work
> independently. But only two DSC encoders from same DCE can be paired
> to work together to support DSC merge mode at DSC V1.2. For DSC V1.1
> two consecutive DSC encoders (start with even index) have to be paired
> to support DSC merge mode.  In addition, the DSC with even index have
> to be mapped to even PINGPONG index and DSC with odd index have to be
> mapped to odd PINGPONG index at its data path in regardless of DSC
> V1.1 or V1.2. This patch improves DSC allocation mechanism with
> consideration of those factors.
> 
> [...]

Applied, thanks!

[1/1] drm/msm/dpu: improve DSC allocation
      https://gitlab.freedesktop.org/lumag/msm/-/commit/858ddb64f1ff

Best regards,
-- 
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>