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Mon, 19 Feb 2024 15:27:53 +0000 Date: Mon, 19 Feb 2024 15:27:52 +0000 Message-ID: <86a5nw4gp3.wl-maz@kernel.org> From: Marc Zyngier To: Zenghui Yu Cc: Naresh Kamboju , open list , Linux ARM , , Linux Regressions , Catalin Marinas , Arnd Bergmann , Dan Carpenter , Anders Roxell Subject: Re: next-20240219: arm64: boot failed - gic_of_init In-Reply-To: References: <86edd84wer.wl-maz@kernel.org> <86cyss4rl7.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: yuzenghui@huawei.com, naresh.kamboju@linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, lkft-triage@lists.linaro.org, regressions@lists.linux.dev, catalin.marinas@arm.com, arnd@arndb.de, dan.carpenter@linaro.org, anders.roxell@linaro.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Mon, 19 Feb 2024 14:46:46 +0000, Zenghui Yu wrote: > > On 2024/2/19 19:32, Marc Zyngier wrote: > > For what it is worth, I've just tested both defconfig and my own > > configuration with both 4k (kvmtool, QEMU+KVM and on SynQuacer) and > > 16k (kvmtool), without any obvious problem. > > I had a quick test on top of next-20240219 with defconfig. I can > reproduce it with QEMU parameter '-cpu max -accel tcg', but things are > fine with '-cpu max,lpa2=off -accel tcg'. > > Bisection shows that the problem happens when we start putting the > latest arm64 and kvmarm changes together. The following hack fixes the > problem for me (but I **only** write it for kernel built with defconfig > with ARM64_4K_PAGES=y atm). > > I can investigate it further tomorrow (as it's too late now ;-) ). Or > maybe Marc or Catalin can help fix it with a proper approach. > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 4f7662008ede..babdc3f4721b 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -2798,6 +2798,7 @@ static const struct arm64_cpu_capabilities > arm64_features[] = { > | .sign = FTR_SIGNED, > | .field_pos = ID_AA64MMFR0_EL1_TGRAN4_SHIFT, > | .min_field_value = ID_AA64MMFR0_EL1_TGRAN4_52_BIT, > |+ .max_field_value = BIT(ID_AA64MMFR0_EL1_TGRAN4_WIDTH - 1) - 1, > | #else > | .sign = FTR_UNSIGNED, > | .field_pos = ID_AA64MMFR0_EL1_TGRAN16_SHIFT, I've posted my take on this at [1], which hopefully matches what you were aiming at. Thanks, M. [1] https://lore.kernel.org/all/86bk8c4gyh.wl-maz@kernel.org/ -- Without deviation from the norm, progress is not possible.