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[2604:1380:40f1:3f00::1]) by mx.google.com with ESMTPS id i8-20020a17090332c800b001d015cec684si4703259plr.238.2024.02.19.07.35.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Feb 2024 07:35:50 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-71578-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) client-ip=2604:1380:40f1:3f00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=FDOOKXa5; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-71578-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:40f1:3f00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-71578-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id 3BBA2B24096 for ; Mon, 19 Feb 2024 15:21:45 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DDDD2383BE; Mon, 19 Feb 2024 15:21:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="FDOOKXa5" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD38B38384; Mon, 19 Feb 2024 15:21:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708356094; cv=none; b=eZlpjfSsQedcBuEgp7i1v/beeP5WBgvQa/yU/bcb2LDRf4GLuqxMErsuPyGtCY9oU4JtF163CHfegDu5KV7bnuewA7bBUk6ucM1+CUYHKc0NAW2eUcnXdPcgbs2YC1SQgAQmdP2JP6dAdZAYtMCF0EEYRuIY8VTawljjwVZbOvA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708356094; c=relaxed/simple; bh=kWjDFBWNyukDqiqilRrkk/NPz9Qf4ovSHkLaWG4pOcs=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=GVF4Z2B4blDtgXx0oYiveVVINxukdyAR5C9xBiF/hAf+Xc3RIvNngsTdu8qkvvLYruXbSh5O9t4xKgFkS7D/+b33fPkdlP6Hemru/yQ3dmHrgTB+RvB+xTKzJSCHQvtRt4EWJeDb8MB9cnnmirlSuYuXQntDFQcVmpiYYAEBpMo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=FDOOKXa5; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id A20DBC433C7; Mon, 19 Feb 2024 15:21:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708356094; bh=kWjDFBWNyukDqiqilRrkk/NPz9Qf4ovSHkLaWG4pOcs=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=FDOOKXa5BKBH1ElXgKDSx2ks+y9Xel5+lS491Zq86zliaMN6GLKy3Llxnvk0DTd61 PR0g4s6crii1spGlwXzoMqPtpGsMYkooXxLbyqe5evvoin9UgVhSpGWuB2fwVTzbVf l1oR9b1TEdrL8JggZ6WGfStnHxQovjg3sTK+wmG6TMhtR5xbVeOhcPr51RugyVpRW2 WvQsM9SHsHgou/6vWLHdYFxK/41/OyriI6nQdOJKXi1c2gePTO43p87SJrzKJMPoeT Yq/FHUWfkf88gl56AJwAelvNdaGENye+7n9iBS59u/so9RPbd+swKW+vbjiJCGhNjO tNV7qxMXasfiA== Date: Mon, 19 Feb 2024 16:21:26 +0100 From: Lorenzo Pieralisi To: Frank Li Cc: bhelgaas@google.com, conor+dt@kernel.org, devicetree@vger.kernel.org, festevam@gmail.com, helgaas@kernel.org, hongxing.zhu@nxp.com, imx@lists.linux.dev, kernel@pengutronix.de, krzysztof.kozlowski+dt@linaro.org, krzysztof.kozlowski@linaro.org, kw@linux.com, l.stach@pengutronix.de, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, manivannan.sadhasivam@linaro.org, robh@kernel.org, s.hauer@pengutronix.de, shawnguo@kernel.org Subject: Re: [PATCH v10 00/14] PCI: imx6: Clean up and add imx95 pci support Message-ID: References: <20240205173335.1120469-1-Frank.Li@nxp.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Mon, Feb 19, 2024 at 10:11:45AM -0500, Frank Li wrote: > On Mon, Feb 05, 2024 at 12:33:21PM -0500, Frank Li wrote: > > first 6 patches use drvdata: flags to simplify some switch-case code. > > Improve maintaince and easy to read code. > > > > @Lorenzo Pieralisi: > > Do you have chance to look other patches? Yes, they are fine. > Mani's apply EP side change. > 'PCI: imx6: Add iMX95 Endpoint (EP) support' need be rebased. What does that mean ? I think it is best to pull the series in a single branch if there are not any dependencies on other branches. Thanks, Lorenzo > Frank > > > Then add imx95 basic pci host function. > > > > follow two patch do endpoint code clean up. > > Then add imx95 basic endpont function. > > > > Compared with v2, added EP function support and some fixes, please change > > notes at each patches. > > > > Change from v9 to v10 > > - remove two patches: > > > dt-bindings: imx6q-pcie: Add linux,pci-domain as required for iMX8MQ > > > PCI: imx6: Using "linux,pci-domain" as slot ID > > it is not good solution to fixed hardcode check to get controller id. > > Will see better solution later. > > > > dt-binding pass pcie node: > > > > pcie0: pcie@4c300000 { > > compatible = "fsl,imx95-pcie"; > > reg = <0 0x4c300000 0 0x40000>, > > <0 0x4c360000 0 0x10000>, > > <0 0x4c340000 0 0x20000>, > > <0 0x60100000 0 0xfe00000>; > > reg-names = "dbi", "atu", "app", "config"; > > #address-cells = <3>; > > #size-cells = <2>; > > device_type = "pci"; > > linux,pci-domain = <0>; > > bus-range = <0x00 0xff>; > > ranges = <0x81000000 0x0 0x00000000 0x0 0x6ff00000 0 0x00100000>, > > <0x82000000 0x0 0x10000000 0x9 0x10000000 0 0x10000000>; > > num-lanes = <1>; > > num-viewport = <8>; > > interrupts = ; > > interrupt-names = "msi"; > > #interrupt-cells = <1>; > > interrupt-map-mask = <0 0 0 0x7>; > > interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, > > <0 0 0 2 &gic 0 0 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, > > <0 0 0 3 &gic 0 0 GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, > > <0 0 0 4 &gic 0 0 GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; > > fsl,max-link-speed = <3>; > > clocks = <&scmi_clk IMX95_CLK_HSIO>, > > <&scmi_clk IMX95_CLK_HSIOPLL>, > > <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, > > <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; > > clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; > > assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>, > > <&scmi_clk IMX95_CLK_HSIOPLL>, > > <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; > > assigned-clock-rates = <3600000000>, <100000000>, <10000000>; > > assigned-clock-parents = <0>, <0>, > > <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>; > > power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; > > /* 0x30~0x37 stream id for pci0 */ > > /* > > * iommu-map = <0x000 &apps_smmu 0x30 0x1>, > > * <0x100 &apps_smmu 0x31 0x1>; > > */ > > status = "disabled"; > > }; > > > > pcie1: pcie-ep@4c380000 { > > compatible = "fsl,imx95-pcie-ep"; > > reg = <0 0x4c380000 0 0x20000>, > > <0 0x4c3e0000 0 0x1000>, > > <0 0x4c3a0000 0 0x1000>, > > <0 0x4c3c0000 0 0x10000>, > > <0 0x4c3f0000 0 0x10000>, > > <0xa 0 1 0>; > > reg-names = "dbi", "atu", "dbi2", "app", "dma", "addr_space"; > > interrupts = ; > > interrupt-names = "dma"; > > fsl,max-link-speed = <3>; > > clocks = <&scmi_clk IMX95_CLK_HSIO>, > > <&scmi_clk IMX95_CLK_HSIOPLL>, > > <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, > > <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; > > clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; > > assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>, > > <&scmi_clk IMX95_CLK_HSIOPLL>, > > <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; > > assigned-clock-rates = <3600000000>, <100000000>, <10000000>; > > assigned-clock-parents = <0>, <0>, > > <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>; > > power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; > > status = "disabled"; > > }; > > > > Frank Li (13): > > PCI: imx6: Simplify clock handling by using clk_bulk*() function > > PCI: imx6: Simplify phy handling by using IMX6_PCIE_FLAG_HAS_PHYDRV > > PCI: imx6: Simplify reset handling by using by using > > *_FLAG_HAS_*_RESET > > PCI: imx6: Simplify ltssm_enable() by using ltssm_off and ltssm_mask > > PCI: imx6: Simplify configure_type() by using mode_off and mode_mask > > PCI: imx6: Simplify switch-case logic by involve init_phy callback > > dt-bindings: imx6q-pcie: Clean up irrationality clocks check > > dt-bindings: imx6q-pcie: Restruct reg and reg-name > > PCI: imx6: Add iMX95 PCIe Root Complex support > > PCI: imx6: Clean up get addr_space code > > PCI: imx6: Add epc_features in imx6_pcie_drvdata > > dt-bindings: imx6q-pcie: Add iMX95 pcie endpoint compatible string > > PCI: imx6: Add iMX95 Endpoint (EP) support > > > > Richard Zhu (1): > > dt-bindings: imx6q-pcie: Add imx95 pcie compatible string > > > > .../bindings/pci/fsl,imx6q-pcie-common.yaml | 17 +- > > .../bindings/pci/fsl,imx6q-pcie-ep.yaml | 46 +- > > .../bindings/pci/fsl,imx6q-pcie.yaml | 49 +- > > drivers/pci/controller/dwc/pci-imx6.c | 634 ++++++++++-------- > > 4 files changed, 436 insertions(+), 310 deletions(-) > > > > -- > > 2.34.1 > >