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[2003:e4:1f2d:4600:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id y14-20020a170906448e00b00a379ef08ecbsm3095648ejo.74.2024.02.19.08.27.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Feb 2024 08:27:28 -0800 (PST) Content-Type: multipart/signed; boundary=b92dee8dca8ec0ea944d06a19142b74f01bffadbe68328557b23cbc6a168; micalg=pgp-sha256; protocol="application/pgp-signature" Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Date: Mon, 19 Feb 2024 17:27:28 +0100 Message-Id: From: "Thierry Reding" To: "Krzysztof Kozlowski" , "Konrad Dybcio" , "Linus Walleij" , "Bartosz Golaszewski" , "Georgi Djakov" , "Bjorn Andersson" , "Sylwester Nawrocki" , =?utf-8?q?Artur_=C5=9Awigo=C5=84?= , "Alim Akhtar" , "Jonathan Hunter" , , , , , , , Subject: Re: [PATCH] interconnect: constify of_phandle_args in xlate X-Mailer: aerc 0.16.0-1-0-g560d6168f0ed-dirty References: <20240216135236.129878-1-krzysztof.kozlowski@linaro.org> <488cc7dc-f45a-4c9e-b572-e4a6b3202e3e@linaro.org> <41e371f1-96f4-45c0-9f65-81ed6924b325@linaro.org> In-Reply-To: <41e371f1-96f4-45c0-9f65-81ed6924b325@linaro.org> --b92dee8dca8ec0ea944d06a19142b74f01bffadbe68328557b23cbc6a168 Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 On Fri Feb 16, 2024 at 2:59 PM CET, Krzysztof Kozlowski wrote: > On 16/02/2024 14:55, Konrad Dybcio wrote: > > On 16.02.2024 14:52, Krzysztof Kozlowski wrote: > >> The xlate callbacks are supposed to translate of_phandle_args to prope= r > >> provider without modifying the of_phandle_args. Make the argument > >> pointer to const for code safety and readability. > >> > >> Signed-off-by: Krzysztof Kozlowski > >> --- > >> drivers/gpio/gpiolib-of.c | 2 +- > >> drivers/interconnect/core.c | 4 ++-- > >> drivers/interconnect/qcom/icc-common.c | 3 ++- > >> drivers/interconnect/qcom/icc-common.h | 3 ++- > >> drivers/interconnect/samsung/exynos.c | 2 +- > >> drivers/memory/tegra/mc.c | 2 +- > >> drivers/memory/tegra/tegra124-emc.c | 2 +- > >> drivers/memory/tegra/tegra124.c | 2 +- > >> drivers/memory/tegra/tegra186-emc.c | 2 +- > >> drivers/memory/tegra/tegra20-emc.c | 2 +- > >> drivers/memory/tegra/tegra20.c | 2 +- > >> drivers/memory/tegra/tegra30-emc.c | 2 +- > >> drivers/memory/tegra/tegra30.c | 2 +- > >> include/linux/interconnect-provider.h | 11 ++++++----- > >> include/soc/tegra/mc.h | 7 ++++--- > >=20 > > Ended up being a bit wider than just icc.. > >=20 > > Looks sane apart from that > > Tegra memory controllers are also interconnect providers, so two subsyste= ms. > > This patch should go via interconnect tree. I think Konrad might have been referring to the GPIO hunk, which seems out of place. For the Tegra parts, though: Acked-by: Thierry Reding --b92dee8dca8ec0ea944d06a19142b74f01bffadbe68328557b23cbc6a168 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmXTgXAACgkQ3SOs138+ s6GIJw//RvytUrxe/nGMKPNdA9bteZUmB2JfZ66rT/aIzbWsUTYEkOeW5vUWjVmW MPR/6YDXkpdL0Q/wiThQ9W3Cjs93mvIMCJF538QY3LkxdEsaUIUk1rYPjKixE958 gA8KAsThqwdocqOWK1ewZw32VgbzLYNIPaKDq9waWrwpNkWf1bfD3fF/ASa8GSlu e31R3iip5rYK3qrml3XZ6+h9oOFsB4u5+wp/azEeCP+o/I9/Fq9zj0I3sIxhgSlK zh4DjKyp480uELj+1FcRmfnS7mJbpyoUibdWkmjet5M6RBveI9SX1DttREXlWJ1m C6+UaVW6FAwh5qfin7Wt7hBxMKI50W/26+NnR/oJIMxnRe4ZRvYsdClPUAbsbIcZ ixTJMFckKgu31r2vhHq+f8mvKoodvGo6+Rt/UAaBnpv4aBGQlXHqQXA0Me0v0paj BAAlZU5dDmKahjg0dFllXswJ6fuRnGyFwLO5q3Uxu4IBYlUoLLHOt23/6vGGdGsm hdOLCVxBqM5T1usBopfL/9SDxNGLFl2LzwI9XRdj+ngB6oGJDRCatPZV2UC0w+Ut 97TULJaYn3ovR/YllkVngF4U883Qy63N3pxbYtZCWbAJ1GC1bZbaK5HZwu862RfK 6DDoAy+GT5NuJwKGswC2m4wgu2pOzDRPHQehU+Ya5B+UdbWOLuY= =8sMu -----END PGP SIGNATURE----- --b92dee8dca8ec0ea944d06a19142b74f01bffadbe68328557b23cbc6a168--