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Date: Tue, 20 Feb 2024 10:53:13 +0100
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: William Zhang <william.zhang@broadcom.com>
Cc: Linux MTD List <linux-mtd@lists.infradead.org>, Linux ARM List
 <linux-arm-kernel@lists.infradead.org>, Broadcom Kernel List
 <bcm-kernel-feedback-list@broadcom.com>, f.fainelli@gmail.com,
 kursad.oney@broadcom.com, joel.peshkin@broadcom.com,
 anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com,
 tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, David Regan
 <dregan@broadcom.com>, linux-kernel@vger.kernel.org, Vignesh Raghavendra
 <vigneshr@ti.com>, Brian Norris <computersforpeace@gmail.com>, Richard
 Weinberger <richard@nod.at>
Subject: Re: [PATCH v5 09/12] mtd: rawnand: brcmnand: Add support for
 getting ecc setting from strap
Message-ID: <20240220105313.5e3c600d@xps-13>
In-Reply-To: <20240207202257.271784-10-william.zhang@broadcom.com>
References: <20240207202257.271784-1-william.zhang@broadcom.com>
	<20240207202257.271784-10-william.zhang@broadcom.com>
Organization: Bootlin
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Hi William,

william.zhang@broadcom.com wrote on Wed,  7 Feb 2024 12:22:54 -0800:

> BCMBCA broadband SoC based board design does not specify ecc setting in
> dts but rather use the SoC NAND strap info to obtain the ecc strength
> and spare area size setting. Add brcm,nand-ecc-use-strap dts propety for
> this purpose and update driver to support this option.
>=20
> The generic nand ecc settings still take precedence over this flag. For
> example, if nand-ecc-strength is set in the dts, the driver ignores the
> strap setting and falls back to original behavior. This makes sure that
> the existing BCMBCA board dts still works the old way even the strap
> flag is set in the BCMBCA chip dtsi.
>=20
> Signed-off-by: William Zhang <william.zhang@broadcom.com>
> Reviewed-by: David Regan <dregan@broadcom.com>
>=20
> ---
>=20
> Changes in v5: None
> Changes in v4:
> - Update the comments for ecc setting selection
>=20
> Changes in v3: None
> Changes in v2:
> - Minor cosmetic fixes
>=20
>  drivers/mtd/nand/raw/brcmnand/brcmnand.c | 83 ++++++++++++++++++++++--
>  1 file changed, 76 insertions(+), 7 deletions(-)
>=20
> diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/=
raw/brcmnand/brcmnand.c
> index 73fdf7ce21aa..efeee9e80213 100644
> --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> @@ -1038,6 +1038,19 @@ static inline int brcmnand_sector_1k_shift(struct =
brcmnand_controller *ctrl)
>  		return -1;
>  }
> =20
> +static int brcmnand_get_sector_size_1k(struct brcmnand_host *host)
> +{
> +	struct brcmnand_controller *ctrl =3D host->ctrl;
> +	int shift =3D brcmnand_sector_1k_shift(ctrl);
> +	u16 acc_control_offs =3D brcmnand_cs_offset(ctrl, host->cs,
> +						  BRCMNAND_CS_ACC_CONTROL);
> +
> +	if (shift < 0)
> +		return 0;
> +
> +	return (nand_readreg(ctrl, acc_control_offs) >> shift) & 0x1;

What is this & 0x1 ? If you return a yes/no value, please make this
function return a bool. Also, please use intermediate steps to clarify
what you do.

sector_1k_bit =3D ...;
acc =3D nand_readreg();
return acc & BIT(sector_1k_bit);

Or something like that.

> +}
> +
>  static void brcmnand_set_sector_size_1k(struct brcmnand_host *host, int =
val)
>  {
>  	struct brcmnand_controller *ctrl =3D host->ctrl;
> @@ -1055,6 +1068,38 @@ static void brcmnand_set_sector_size_1k(struct brc=
mnand_host *host, int val)
>  	nand_writereg(ctrl, acc_control_offs, tmp);
>  }
> =20
> +static int brcmnand_get_spare_size(struct brcmnand_host *host)
> +{
> +	struct brcmnand_controller *ctrl =3D host->ctrl;
> +	u16 acc_control_offs =3D brcmnand_cs_offset(ctrl, host->cs,
> +						  BRCMNAND_CS_ACC_CONTROL);
> +	u32 acc =3D nand_readreg(ctrl, acc_control_offs);
> +
> +	return (acc & brcmnand_spare_area_mask(ctrl));
> +}
> +
> +static int brcmnand_get_ecc_strength(struct brcmnand_host *host)

					_from_strap

> +{
> +	struct brcmnand_controller *ctrl =3D host->ctrl;
> +	u16 acc_control_offs =3D brcmnand_cs_offset(ctrl, host->cs,
> +						  BRCMNAND_CS_ACC_CONTROL);
> +	int sector_size_1k =3D brcmnand_get_sector_size_1k(host);
> +	int spare_area_size, ecc_level, ecc_strength;
> +	u32 acc;
> +
> +	spare_area_size =3D brcmnand_get_spare_size(host);
> +	acc =3D nand_readreg(ctrl, acc_control_offs);
> +	ecc_level =3D (acc & brcmnand_ecc_level_mask(ctrl)) >> ctrl->ecc_level_=
shift;

Please use FIELD_PREP/FIELD_GET.

> +	if (sector_size_1k)
> +		ecc_strength =3D ecc_level * 2;
> +	else if (spare_area_size =3D=3D 16 && ecc_level =3D=3D 15)
> +		ecc_strength =3D 1; /* hamming */
> +	else
> +		ecc_strength =3D ecc_level;
> +
> +	return ecc_strength;
> +}
> +
>  /***********************************************************************
>   * CS_NAND_SELECT
>   ***********************************************************************/
> @@ -2622,19 +2667,43 @@ static int brcmnand_setup_dev(struct brcmnand_hos=
t *host)
>  		nanddev_get_memorg(&chip->base);
>  	struct brcmnand_controller *ctrl =3D host->ctrl;
>  	struct brcmnand_cfg *cfg =3D &host->hwcfg;
> -	char msg[128];
> +	struct device_node *np =3D nand_get_flash_node(chip);
>  	u32 offs, tmp, oob_sector;
> -	int ret;
> +	int ret, sector_size_1k =3D 0;
> +	bool use_strap =3D false;
> +	char msg[128];
> =20
>  	memset(cfg, 0, sizeof(*cfg));
> +	use_strap =3D of_property_read_bool(np, "brcm,nand-ecc-use-strap");
> =20
> -	ret =3D of_property_read_u32(nand_get_flash_node(chip),
> -				   "brcm,nand-oob-sector-size",
> +	/*
> +	 * Set ECC size and strength based on hw configuration from strap
> +	 * if brcm,nand-ecc-use-strap is set. However if nand-ecc-strength
> +	 * is set, its value will be used and ignore the strap setting.

Please error out in this case. It's one or the other, not both.

> +	 */
> +	if (chip->ecc.strength)
> +		use_strap =3D 0;
> +
> +	if (use_strap) {
> +		chip->ecc.strength =3D brcmnand_get_ecc_strength(host);
> +		sector_size_1k =3D brcmnand_get_sector_size_1k(host);
> +		if (chip->ecc.size =3D=3D 0) {
> +			if (sector_size_1k < 0)
> +				chip->ecc.size =3D 512;
> +			else
> +				chip->ecc.size =3D 512 << sector_size_1k;
> +		}

I'd instead make a function named brcmnand_get_ecc_settings() with the
chip->ecc parameter, so you can directly fill the entries without
getting another time the sector_size_1k thing.

Strength and step size are tightly linked, it does make sense to derive
them both at the same time.

> +	}
> +
> +	ret =3D of_property_read_u32(np, "brcm,nand-oob-sector-size",
>  				   &oob_sector);
>  	if (ret) {
> -		/* Use detected size */
> -		cfg->spare_area_size =3D mtd->oobsize /
> -					(mtd->writesize >> FC_SHIFT);
> +		if (use_strap)
> +			cfg->spare_area_size =3D brcmnand_get_spare_size(host);
> +		else
> +			/* Use detected size */
> +			cfg->spare_area_size =3D mtd->oobsize /
> +						(mtd->writesize >> FC_SHIFT);
>  	} else {
>  		cfg->spare_area_size =3D oob_sector;
>  	}


Thanks,
Miqu=C3=A8l