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Tue, 20 Feb 2024 10:12:41 +0000 Received: from SEZPR06MB6959.apcprd06.prod.outlook.com ([fe80::53da:a8a:83cb:b9ad]) by SEZPR06MB6959.apcprd06.prod.outlook.com ([fe80::53da:a8a:83cb:b9ad%4]) with mapi id 15.20.7292.036; Tue, 20 Feb 2024 10:12:41 +0000 Message-ID: Date: Tue, 20 Feb 2024 18:12:37 +0800 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC v2 1/5] dt-bindings: clock: histb-clock: Add missing common clock and Hi3798MV200 specific clock definition Content-Language: en-US To: Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: David Yang , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20240217-clk-mv200-v2-0-b782e4eb66f7@outlook.com> <20240217-clk-mv200-v2-1-b782e4eb66f7@outlook.com> <875b706f-801a-4a4c-8806-411a67c5a5e7@linaro.org> From: Yang Xiwen In-Reply-To: <875b706f-801a-4a4c-8806-411a67c5a5e7@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TMN: [MtNTJoRgWN1QzCxomNDvjmwM1cOcxpJt90izkn63du149vKFDjz5EFOorSJydgBr] X-ClientProxiedBy: TYCP286CA0188.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:382::17) To SEZPR06MB6959.apcprd06.prod.outlook.com (2603:1096:101:1ed::14) X-Microsoft-Original-Message-ID: <72a2551d-21f4-4e29-895d-f12d251c5e2b@outlook.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SEZPR06MB6959:EE_|SEZPR06MB5574:EE_ X-MS-Office365-Filtering-Correlation-Id: c131ffc1-ff55-4e2f-74ab-08dc31fc7929 X-Microsoft-Antispam: BCL:0; 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It's anyway placed oddly, the entries are ordered by number/value. > >> +#define HISTB_USB2_UTMI1_CLK 58 >> +#define HISTB_USB3_REF_CLK 59 >> +#define HISTB_USB3_GM_CLK 60 >> +#define HISTB_USB3_GS_CLK 61 >> + >> +/* Hi3798MV200 specific clocks */ >> + >> +// reuse clocks of histb > Don't mix comment styles. > >> +#define HI3798MV200_GMAC_CLK HISTB_ETH0_MAC_CLK >> +#define HI3798MV200_GMACIF_CLK HISTB_ETH0_MACIF_CLK >> +#define HI3798MV200_FEMAC_CLK HISTB_ETH1_MAC_CLK >> +#define HI3798MV200_FEMACIF_CLK HISTB_ETH1_MACIF_CLK >> +#define HI3798MV200_FEPHY_CLK HISTB_ETH1_PHY_CLK > I don't understand what do you want to achieve here. Clock IDs start > from 0 or 1. They are aliases. A friendlier name compared to ETH0/1. > > > > Best regards, > Krzysztof > -- Regards, Yang Xiwen